Merge pull request #46 from Ironedde/atempt2-update-svd2rust-and-form

Re-generate register mappings with svd2rust 0.30.2
GrepitAB · Mar 4, 2024 · af11f87 · af11f87
2 parents b390833 + b8bfc0a
commit af11f87
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diff --git a/mcan/CHANGELOG.md b/mcan/CHANGELOG.md
@@ -3,6 +3,7 @@
 Tagging in git follows a pattern: `mcan/<version>`.
 
 ## [Unreleased]
+- *Breaking* Update the register mappings with svd2rust 0.30.2 and form 0.10.0 (#46)
 
 ## [0.4.0] - 2023-10-24
 

diff --git a/mcan/src/bus.rs b/mcan/src/bus.rs
@@ -42,14 +42,14 @@ impl Debug for ProtocolStatus {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> fmt::Result {
         f.debug_struct("ProtocolStatus")
             .field("tdcv", &self.tdcv().bits())
-            .field("pxe", &self.pxe().bits())
-            .field("rfdf", &self.rfdf().bits())
-            .field("rbrs", &self.rbrs().bits())
-            .field("resi", &self.resi().bits())
+            .field("pxe", &self.pxe().bit())
+            .field("rfdf", &self.rfdf().bit())
+            .field("rbrs", &self.rbrs().bit())
+            .field("resi", &self.resi().bit())
             .field("dlec", &self.dlec().bits())
-            .field("bo", &self.bo().bits())
-            .field("ew", &self.ew().bits())
-            .field("ep", &self.ep().bits())
+            .field("bo", &self.bo().bit())
+            .field("ew", &self.ew().bit())
+            .field("ep", &self.ep().bit())
             .field("act", &self.act().bits())
             .field("lec", &self.lec().bits())
             .finish()
@@ -326,9 +326,9 @@ impl<'a, Id: mcan_core::CanId, D: mcan_core::Dependencies<Id>, C: Capacities>
         // filter API
         reg.gfc.write(|w| {
             w.anfs()
-                .variant(crate::reg::gfc::ANFS_A::REJECT)
+                .variant(crate::reg::gfc::ANFSSELECT_A::REJECT)
                 .anfe()
-                .variant(crate::reg::gfc::ANFE_A::REJECT)
+                .variant(crate::reg::gfc::ANFESELECT_A::REJECT)
         });
 
         // Configure test/loopback mode

diff --git a/mcan/src/config.rs b/mcan/src/config.rs
@@ -1,6 +1,6 @@
 //! CAN bus configuration
 
-pub use crate::reg::{self, tscc::TSS_A as TimeStampSelect};
+pub use crate::reg::{self, tscc::TSSSELECT_A as TimeStampSelect};
 use core::ops::RangeInclusive;
 use fugit::HertzU32;