[https://nvbugs/5518713][fix] Trtllm-gen moe backend for blockwise fp8 ckpt (Qwen3-235B-A22B-FP8) #7856
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📝 WalkthroughWalkthroughC++ FP8 MoE changes: accept routing logits as float or bfloat16, enforce 0 < top_k ≤ 8 for Renormalize/RenormalizeNaive, and change routing_logits pointer to a generic void*. Python custom ops: make n_group, topk_group, and routed_scaling_factor Optional in FP4/FP8 runner constructors and public entrypoints. Tests: add an FP8-block-scales integration test for Qwen3-235B. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
participant Py as Python op (fp8_block_scale_moe_runner)
participant Runner as FP8BlockScaleMoERunner
participant Cpp as C++ fp8BlockScaleMoe
participant Kernel as MoE Kernel
Py->>Runner: __init__(..., n_group?, topk_group?, routed_scaling_factor?, routing_method_type)
Note right of Runner: Optional params accepted (may be None)
Py->>Cpp: invoke with tensors (routing_logits, bias, weights, scales, ...)
Cpp->>Cpp: Validate routing_logits dtype ∈ {float, bfloat16}
Cpp->>Cpp: If routing_method ∈ {Renormalize, RenormalizeNaive}<br/>require 0 < top_k ≤ 8
Cpp->>Kernel: run(args with generic routing_logits pointer (void*))
Kernel-->>Cpp: outputs
Cpp-->>Py: outputs
Estimated code review effort🎯 4 (Complex) | ⏱️ ~45 minutes Pre-merge checks and finishing touches❌ Failed checks (2 warnings)
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Signed-off-by: Jhao-Ting Chen <[email protected]>
…TLLM Signed-off-by: Jhao-Ting Chen <[email protected]>
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♻️ Duplicate comments (1)
tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py (1)
589-608: Silence fake-path unused parameters (ruff ARG001) per static analysisSame change as above; underscores are harmless and keep the schema intact.
🧹 Nitpick comments (5)
tests/integration/defs/accuracy/test_llm_api_pytorch.py (1)
2862-2893: Add SM120/121 skip guard for TRTLLM MOE to match NVFP4 testsParity with existing NVFP4 tests avoids CI flakes on unsupported SMs.
Apply this diff inside test_fp8_block_scales immediately after the function signature:
def test_fp8_block_scales(self, tp_size, pp_size, ep_size, attention_dp, cuda_graph, overlap_scheduler, moe_backend): + if moe_backend == "TRTLLM" and (get_sm_version() == 120 or get_sm_version() == 121): + pytest.skip("MOE TRTLLM backend does not support SM version 120 or 121") pytorch_config = dict(cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp (2)
41-45: Fix typo in arch check error textUse “SM100 family” to match isSM100Family().
- TORCH_CHECK(tensorrt_llm::common::isSM100Family(), "Only SM100f is supported by FP8 block scale MOE"); + TORCH_CHECK(tensorrt_llm::common::isSM100Family(), "Only SM100 family is supported by FP8 block scale MOE");
74-76: Top‑k constraint now enforced for Renormalize/NaiveGood to gate unsupported configs; please mirror this constraint in Python‑side validation or docs to surface earlier to users.
tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py (2)
545-552: Expose Optionals in the FP8 op schema: good; align fake path to silence ARG001Update the fake impl’s parameter names to underscore unused args to satisfy ruff without changing schema.
@fp8_block_scale_moe_runner.register_fake def _( - routing_logits: torch.Tensor, - routing_bias: torch.Tensor, + _routing_logits: torch.Tensor, + _routing_bias: torch.Tensor, hidden_states: torch.Tensor, - hidden_states_scale: torch.Tensor, - gemm1_weights: torch.Tensor, - gemm1_weights_scale: torch.Tensor, - gemm2_weights: torch.Tensor, - gemm2_weights_scale: torch.Tensor, - num_experts: int, - top_k: int, - n_group: Optional[int], - topk_group: Optional[int], - intermediate_size: int, - local_expert_offset: int, - local_num_experts: int, - routed_scaling_factor: Optional[float], - routing_method_type: int, + _hidden_states_scale: torch.Tensor, + _gemm1_weights: torch.Tensor, + _gemm1_weights_scale: torch.Tensor, + _gemm2_weights: torch.Tensor, + _gemm2_weights_scale: torch.Tensor, + _num_experts: int, + _top_k: int, + _n_group: Optional[int], + _topk_group: Optional[int], + _intermediate_size: int, + _local_expert_offset: int, + _local_num_experts: int, + _routed_scaling_factor: Optional[float], + _routing_method_type: int, ) -> torch.Tensor:
533-553: Consider making routing_bias Optional in FP8 inputs to match C++ signatureC++ accepts optional bias; Python FP8 dataclass/op currently requires a Tensor. Making it Optional keeps APIs consistent and avoids surprises if bias is absent.
- routing_bias: torch.Tensor + routing_bias: Optional[torch.Tensor]And in the op schema:
- routing_bias: torch.Tensor, + routing_bias: Optional[torch.Tensor],
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cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp(4 hunks)tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py(3 hunks)tests/integration/defs/accuracy/test_llm_api_pytorch.py(1 hunks)
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🧠 Learnings (4)
📓 Common learnings
Learnt from: sklevtsov-nvidia
PR: NVIDIA/TensorRT-LLM#3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
PR: NVIDIA/TensorRT-LLM#3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Applied to files:
cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp
📚 Learning: 2025-08-14T23:23:27.449Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Applied to files:
cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp
📚 Learning: 2025-08-20T07:43:36.447Z
Learnt from: ChristinaZ
PR: NVIDIA/TensorRT-LLM#7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Applied to files:
cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp
🧬 Code graph analysis (3)
cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp (3)
cpp/tensorrt_llm/thop/fp4BlockScaleMoe.cpp (1)
routing_logits(300-309)cpp/tensorrt_llm/thop/mxFp4BlockScaleMoe.cpp (2)
routing_logits(393-402)routing_logits(450-462)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.h (1)
top_k(221-221)
tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py (1)
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.h (5)
n_group(222-222)topk_group(224-224)intermediate_size(226-226)local_expert_offset(227-227)local_num_experts(228-228)
tests/integration/defs/accuracy/test_llm_api_pytorch.py (4)
tensorrt_llm/llmapi/llm_args.py (3)
CudaGraphConfig(108-165)MoeConfig(168-196)KvCacheConfig(972-1106)tensorrt_llm/llmapi/llm.py (1)
LLM(1022-1038)tests/integration/defs/conftest.py (1)
llm_models_root(77-82)tests/integration/defs/accuracy/accuracy_core.py (4)
MMLU(276-290)evaluate(147-206)evaluate(712-722)GSM8K(293-308)
🪛 Ruff (0.13.0)
tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py
601-601: Unused function argument: n_group
(ARG001)
602-602: Unused function argument: topk_group
(ARG001)
603-603: Unused function argument: intermediate_size
(ARG001)
604-604: Unused function argument: local_expert_offset
(ARG001)
605-605: Unused function argument: local_num_experts
(ARG001)
606-606: Unused function argument: routed_scaling_factor
(ARG001)
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🔇 Additional comments (2)
tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py (1)
379-386: LGTM: Optional group and scaling args added to FP8 runnerAPI matches fp4/mx paths and unblocks None defaults.
cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp (1)
95-95: routing_logits pointer type matches API
MoERunnerArgs.routing_logits is declared as void* in runner.h (line 193) and args.routing_logits = routing_logits.data_ptr() correctly supplies a void*; no header changes needed. Downstream kernels should continue casting this void* to the appropriate element type.
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