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[Draft][PyTorch][MOE] Support NVFP4 Grouped Linear #2215
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1679df3
pipeclean, fix nvfp4 padding of 32 alignment
zhongbozhu c5bef0b
[pre-commit.ci] auto fixes from pre-commit.com hooks
pre-commit-ci[bot] 4ac9df6
numerical test passed
zhongbozhu cc86cd0
fix CI failure with test_cast_master_weights_to_fp8 (in a hacky way)
zhongbozhu b2588fb
found CUDA mis-aligned address error in training in multi-swizzle, ha…
zhongbozhu 0400a8c
leave comments about alignment issue
zhongbozhu fa9e075
fused bulk alloc nvfp4
zhongbozhu 4253335
fix RHT sign mask CPU overhead
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Mathematically, a 0-D tensor is a scalar with 1 entry.