UART integration

.devcontainer/Dockerfile

@@ -1,4 +1,7 @@
 ARG VARIANT=ubuntu-22.04
+
+FROM ghcr.io/utoss/oss-cad-suite:latest AS oss-cad-suite
+
 FROM mcr.microsoft.com/vscode/devcontainers/base:${VARIANT}
 
 ENV DEBIAN_FRONTEND=noninteractive
@@ -42,3 +45,8 @@ RUN mkdir /tmp/sv2v && \
 
 # Install LibreLane (pinned to latest known stable)
 RUN pip3 install librelane==3.0.3
+
+# Copy OSS CAD Suite installation from prebuilt image
+COPY --from=oss-cad-suite /opt/oss-cad-suite /opt/oss-cad-suite
+COPY --from=oss-cad-suite /etc/profile.d/oss-cad-suite.sh /etc/profile.d/oss-cad-suite.sh
+ENV PATH="/opt/oss-cad-suite/bin:${PATH}"

.github/workflows/docker-image.yml

@@ -0,0 +1,83 @@
+name: Docker image build template workflow
+
+on:
+  workflow_call:
+    inputs:
+      image-name:
+        required: true
+        type: string
+      dockerfile:
+        required: true
+        type: string
+      tag-prefix:
+        required: false
+        type: string
+        default: ""
+    outputs:
+      image-tag:
+        description: Built image tags
+        value: ${{ jobs.build.outputs.image-tag }}
+      image-primary-tag:
+        description: Primary image tag
+        value: ${{ jobs.build.outputs.image-primary-tag }}
+
+jobs:
+  build:
+    timeout-minutes: 30
+    runs-on: ubuntu-latest
+    outputs:
+      image-tag: ${{ steps.meta.outputs.tags }}
+      image-primary-tag: ${{ fromJSON(steps.meta.outputs.json).tags[0] }}
+      image-digest: ${{ steps.build.outputs.digest }}
+
+    steps:
+      - name: Free up disk space
+        run: |
+          sudo rm -rf /usr/share/dotnet
+          sudo rm -rf /usr/local/lib/android
+          sudo rm -rf /opt/ghc
+          sudo rm -rf /opt/hostedtoolcache/CodeQL
+          sudo apt-get clean
+          docker system prune -af --volumes
+          echo "Available space after cleanup:"
+          df -h
+
+      - name: Checkout code
+        uses: actions/checkout@v4
+
+      - name: Set up Docker Buildx
+        uses: docker/setup-buildx-action@v3
+
+      - name: Login to GitHub Container Registry
+        uses: docker/login-action@v3
+        with:
+          registry: ghcr.io
+          username: ${{ github.actor }}
+          password: ${{ secrets.GITHUB_TOKEN }}
+
+      - name: Extract metadata
+        id: meta
+        uses: docker/metadata-action@v5
+        with:
+          images: ${{ inputs.image-name }}
+          tags: |
+            type=ref,event=branch,prefix=${{ inputs.tag-prefix }}branch-
+            type=ref,event=pr,prefix=${{ inputs.tag-prefix }}pr-
+            type=raw,value=latest,prefix=#${{ inputs.tag-prefix }},enable={{is_default_branch}}
+
+      - name: Build and push Docker image
+        id: build
+        uses: docker/build-push-action@v5
+        with:
+          context: .
+          file: ${{ inputs.dockerfile }}
+          push: true
+          tags: ${{ steps.meta.outputs.tags }}
+          labels: ${{ steps.meta.outputs.labels }}
+          platforms: linux/amd64
+          cache-from: |
+            type=gha
+            type=registry,ref=${{ inputs.image-name }}:buildcache
+          cache-to: |
+            type=gha,mode=max
+            type=registry,ref=${{ inputs.image-name }}:buildcache,mode=max

.github/workflows/gds.yaml

@@ -61,6 +61,9 @@ jobs:
       - name: sv2v
         run: make sv2v
 
+      - name: check file
+        run: ls -la src/utoss-risc-v/src/Instruction_Decode
+
       - name: Build GDS
         uses: TinyTapeout/tt-gds-action@ttgf26a
         with:
@@ -77,14 +80,45 @@ jobs:
   gl_test:
     needs: gds
     runs-on: ubuntu-24.04
+    container:
+      image: ghcr.io/utoss/risc-v-ttgf-devcontainer:latest
     steps:
       - name: checkout repo
         uses: actions/checkout@v6
         with:
           submodules: recursive
 
-      - name: GL test
-        uses: TinyTapeout/tt-gds-action/gl_test@ttgf26a
+      - name: Download GDS artifact
+        uses: actions/download-artifact@v7
+        with:
+          name: tt_submission
+
+      - name: Enable PDK
+        shell: bash
+        env:
+          PDK_ROOT: /home/runner/pdk
+          PDK_VERSION: 54435919abffb937387ec956209f9cf5fd2dfbee
+        run: |
+          python3 -m ciel enable --pdk-family gf180mcu --pdk-root "$PDK_ROOT" "$PDK_VERSION"
+
+      - name: Run GL test
+        shell: bash
+        env:
+          PDK_ROOT: /home/runner/pdk
+        run: |
+          cp tt_submission/*.v test/gate_level_netlist.v
+          cd test
+          rm -f tb_gl.vcd tb.fst gl_test.log simv_gl
+          bash run_gl_icarus.sh
+
+      - name: Upload Waveform and Test Results
+        if: always()
+        uses: actions/upload-artifact@v7
+        with:
+          name: gatelevel_test_results
+          path: |
+            test/tb_gl.vcd
+            test/gl_test.log
 
   viewer:
     needs: gds

.github/workflows/setup.yaml

@@ -0,0 +1,24 @@
+name: setup
+
+on:
+  push:
+    branches: [main]
+  pull_request:
+  workflow_dispatch: {}
+
+permissions:
+  contents: read
+  packages: write
+
+jobs:
+  build_devcontainer_image:
+    # do this during a push to a branch (e.g. to main) or on a non-fork PR
+    if: >
+      github.event_name == 'push' ||
+      (github.event.pull_request != null && github.event.pull_request.head.repo.full_name == github.repository)
+    uses: ./.github/workflows/docker-image.yml
+    with:
+      image-name: ghcr.io/utoss/risc-v-ttgf-devcontainer
+      dockerfile: .devcontainer/Dockerfile
+      tag-prefix: ""
+    secrets: inherit

.github/workflows/test.yaml

@@ -1,31 +1,27 @@
 name: test
-on: [push, workflow_dispatch]
+on:
+  push:
+    branches:
+      - main
+  pull_request:
+    types: [opened, labeled, synchronize]
+  workflow_dispatch:
+
 jobs:
   test:
     runs-on: ubuntu-24.04
+    container:
+      image: ghcr.io/utoss/risc-v-ttgf-devcontainer:latest
     steps:
       - name: Checkout repo
         uses: actions/checkout@v6
         with:
           submodules: recursive
 
-      - name: Install iverilog
-        shell: bash
-        run: sudo apt-get update && sudo apt-get install -y iverilog
-
-      # Set Python up and install cocotb
-      - name: Setup python
-        uses: actions/setup-python@v6
-        with:
-          python-version: '3.11'
-
       - name: Install Python packages
         shell: bash
         run: pip install -r test/requirements.txt
 
-      - name: Install sv2v
-        uses: ./.github/actions/install-sv2v
-
       - name: sv2v
         run: make sv2v
 

.gitignore

@@ -13,3 +13,4 @@ test/__pycache__/
 test/results.xml
 test/gate_level_netlist.v
 tt
+.venv/

Makefile

@@ -1,6 +1,21 @@
 # Convert SystemVerilog (.sv) files to Verilog (.v) using sv2v
 
-SV_FILES := $(shell find src/ -follow -name "*.sv" -type f 2>/dev/null | grep -v '/src/src')
+# SV_FILES := $(shell find src/ -follow -name "*.sv" -type f 2>/dev/null | grep -v '/src/src')
+SV_FILES := \
+	src/tt_um_utoss_riscv.sv \
+	src/MA.sv \
+	src/utoss-risc-v/src/ALU_ALUdecoder/ALU.sv \
+	src/utoss-risc-v/src/ALU_ALUdecoder/ALUdecoder.sv \
+	src/utoss-risc-v/src/ControlFSM.sv \
+	src/utoss-risc-v/src/fetch.sv \
+	src/utoss-risc-v/src/Instruction_Decode/Instruction_Decode.sv \
+	src/utoss-risc-v/src/Instruction_Decode/MemoryLoader.sv \
+	src/utoss-risc-v/src/Instruction_Decode/RegisterFile.sv \
+	src/utoss-risc-v/src/uart_bus_master.sv \
+	src/utoss-risc-v/src/uart_rx.sv \
+	src/utoss-risc-v/src/uart_tx.sv \
+	src/utoss-risc-v/src/uart.sv \
+	src/utoss-risc-v/src/utoss_riscv.sv
 INCLUDE_FLAGS := -I src/utoss-risc-v/
 DEFINE_FLAGS := -DUTOSS_RISCV_HARDENING
 V_FILES := $(SV_FILES:.sv=.sv2v.v)
@@ -12,10 +27,19 @@ sv2v:
 	@sv2v $(INCLUDE_FLAGS) $(DEFINE_FLAGS) $(SV_FILES) -w .sv2v_temp
 	@for svfile in $(SV_FILES); do \
 		module_name=$$(basename "$$svfile" .sv); \
-		if [ -f ".sv2v_temp/$$module_name.v" ]; then \
-			mv ".sv2v_temp/$$module_name.v" "$$(dirname "$$svfile")/$$module_name.sv2v.v"; \
+		generated_file=$$(find .sv2v_temp -maxdepth 1 -type f -iname "$$module_name.v" | head -n 1); \
+		if [ -n "$$generated_file" ]; then \
+			mv "$$generated_file" "$$(dirname "$$svfile")/$$module_name.sv2v.v"; \
 		fi; \
 	done
+	@missing=0; \
+	for relpath in $$(sed -n 's/^[[:space:]]*-[[:space:]]*"\(.*\.sv2v\.v\)".*/\1/p' info.yaml); do \
+		if [ ! -f "src/$$relpath" ]; then \
+			echo "ERROR: Expected generated file missing: src/$$relpath" >&2; \
+			missing=1; \
+		fi; \
+	done; \
+	test $$missing -eq 0
 	@rm -rf .sv2v_temp
 
 tt: sv2v

info.yaml

@@ -25,7 +25,11 @@ project:
     - "utoss-risc-v/src/fetch.sv2v.v"
     - "utoss-risc-v/src/Instruction_Decode/Instruction_Decode.sv2v.v"
     - "utoss-risc-v/src/Instruction_Decode/MemoryLoader.sv2v.v"
-    - "utoss-risc-v/src/Instruction_Decode/registerFile.v"
+    - "utoss-risc-v/src/Instruction_Decode/RegisterFile.sv2v.v"
+    - "utoss-risc-v/src/uart_bus_master.sv2v.v"
+    - "utoss-risc-v/src/uart_rx.sv2v.v"
+    - "utoss-risc-v/src/uart_tx.sv2v.v"
+    - "utoss-risc-v/src/uart.sv2v.v"
     - "utoss-risc-v/src/utoss_riscv.sv2v.v"
 
 # The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.

src/config.json

@@ -17,7 +17,7 @@
 
   "//": "CLOCK_PERIOD - Increase this in case you are getting setup time violations.",
   "//": "The value is in nanoseconds, so 20ns == 50MHz.",
-  "CLOCK_PERIOD": 40,
+  "CLOCK_PERIOD": 100,
 
   "//": "Hold slack margin - Increase them in case you are getting hold violations.",
   "PL_RESIZER_HOLD_SLACK_MARGIN": 0.1,
@@ -37,6 +37,10 @@
   "VERILOG_INCLUDE_DIRS": ["src/utoss-risc-v"],
   "VERILOG_DEFINES": ["UTOSS_RISCV_HARDENING"],
 
+  "//": "Attempt to fix attennas more agressively",
+  "GRT_ANTENNA_ITERS": 20,
+  "DIODE_PADDING": 20,
+
   "//": "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!",
   "//": "!!! DO NOT CHANGE ANYTHING BELOW THIS POINT !!!",
   "//": "!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!",