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c0ddb20
run riscof setup --dutname=utoss_riscv
TheDeepestSpace Jul 22, 2025
49e4641
build toolchain
TheDeepestSpace Jul 25, 2025
6c8aa30
basic riscof config + SV dut
TheDeepestSpace Jul 25, 2025
11b233e
parameterize top over MEM_SIZE
TheDeepestSpace Jul 25, 2025
f162aaa
add elf->mem conversion
TheDeepestSpace Jul 25, 2025
d68ed30
fix mem dump
TheDeepestSpace Jul 26, 2025
a83dc3c
WIP: mem size
TheDeepestSpace Jul 26, 2025
70a4c69
add path to dut's folder in riscof config
TheDeepestSpace Jul 26, 2025
02e0a61
specify memory size for top module
TheDeepestSpace Jul 26, 2025
071e80a
move memory offset to 0 for dut
TheDeepestSpace Jul 26, 2025
924509d
explicitly name mem file
TheDeepestSpace Jul 27, 2025
3e9790d
pass memory to dut
TheDeepestSpace Jul 27, 2025
fccd83a
fix dut build
TheDeepestSpace Jul 27, 2025
93ead55
make dut build a prereq for riscof run
TheDeepestSpace Jul 27, 2025
eab83e0
fix dut
TheDeepestSpace Jul 27, 2025
3e69e6f
add logging
TheDeepestSpace Jul 27, 2025
0a555ff
fix mem injection
TheDeepestSpace Jul 27, 2025
779eda6
set up waiting and signature extraciton
TheDeepestSpace Jul 27, 2025
820268a
fix mem file
TheDeepestSpace Jul 27, 2025
07e6d04
only run most basic tests
TheDeepestSpace Jul 27, 2025
ea8d2b4
add timeout for ci jobs
TheDeepestSpace Jul 27, 2025
8908f92
Merge branch 'main' into boris/riscof
TheDeepestSpace Jul 28, 2025
c226829
set up ci for riscof
TheDeepestSpace Jul 28, 2025
44bad0c
fix riscof needs
TheDeepestSpace Jul 28, 2025
af72a1c
install riscof as root in ci
TheDeepestSpace Jul 28, 2025
520a8dc
make dut dump its vcd for riscof tests
TheDeepestSpace Jul 29, 2025
3e9a27e
extend timeout
TheDeepestSpace Jul 29, 2025
b9162a7
make riscof config dynamic
TheDeepestSpace Aug 29, 2025
677004b
Merge branch 'main' into boris/riscof
TheDeepestSpace Aug 29, 2025
f13213b
add report upload
TheDeepestSpace Aug 29, 2025
d50b07a
Merge branch 'main' into boris/riscof
TheDeepestSpace Sep 8, 2025
a46dc5c
bump dut timeout to 10k cc's
TheDeepestSpace Sep 8, 2025
7fb8235
stop toolchain from emitting compressed instructions
TheDeepestSpace Sep 22, 2025
45dcd8b
bump timeout
TheDeepestSpace Sep 22, 2025
ca20d1d
fix memory signature dump
TheDeepestSpace Sep 22, 2025
4a936b7
fix tohost
TheDeepestSpace Sep 24, 2025
5206fce
fix riscof reporting in ci
TheDeepestSpace Sep 25, 2025
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33 changes: 33 additions & 0 deletions .github/workflows/ci.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ permissions:

jobs:
build_ci_image:
timeout-minutes: 30
runs-on: ubuntu-latest
outputs:
image-tag: ${{ steps.meta.outputs.tags }}
Expand Down Expand Up @@ -60,6 +61,7 @@ jobs:
type=registry,ref=ghcr.io/utoss/risc-v:buildcache,mode=max

build_and_test:
timeout-minutes: 30
needs: build_ci_image
runs-on: ubuntu-latest
container:
Expand Down Expand Up @@ -95,3 +97,34 @@ jobs:
name: vvp-files
path: out/*.vvp
retention-days: 7

riscof:
timeout-minutes: 30
needs: [build_ci_image, build_and_test]
runs-on: ubuntu-latest
container:
image: ${{ needs.build_ci_image.outputs.image-primary-tag }}

steps:
- name: Checkout code
uses: actions/checkout@v4

- name: Build DUT
run: make riscof_build_dut

- name: Validate YAML
run: make riscof_validateyaml

- name: Clone arch-test
run: make riscof_clone_archtest

- name: Run RISCOF
run: make riscof_run

- name: Upload RISCOF report
if: always()
uses: actions/upload-artifact@v4
with:
name: riscof-report
path: riscof/riscof_work/report.html
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retention-days: 7
6 changes: 6 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -2,3 +2,9 @@
*.vcd

.devcontainer/

riscof/riscof_work/
riscof/riscv-arch-test/
riscof/utoss_riscv/__pycache__/
riscof/sail_cSim/__pycache__
riscof/config.ini
29 changes: 29 additions & 0 deletions Dockerfile.ci
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
FROM ghcr.io/utoss/risc-v-toolchain:latest AS risc-v-toolchain

FROM public.ecr.aws/lts/ubuntu:22.04_stable

ARG DEBIAN_FRONTEND=noninteractive
Expand Down Expand Up @@ -32,5 +34,32 @@ RUN sudo apt update && sudo apt install -y autoconf gperf make gcc g++ bison fle
cd iverilog-* && sh autoconf.sh && ./configure && make && make check && sudo make install && \
cd .. && rm ${ICARUS_SRC_TAR} && rm -rf ./iverilog-*

# install riscv toolchain
USER dev
COPY --from=risc-v-toolchain /opt/riscv /opt/riscv
ENV PATH="/opt/riscv/bin:${PATH}"

# install SAIL simulator
USER dev
ARG SAIL_RISCV_VERSION=0.7
ARG SAIL_RISCV_ZIP_NAME=sail_riscv-Linux-x86_64.tar.gz
ARG SAIL_RISCV_ZIP_URL=https://github.com/riscv/sail-riscv/releases/download/${SAIL_RISCV_VERSION}/${SAIL_RISCV_ZIP_NAME}
ARG SAIL_RISCV_ZIP_HASH="6b8c3abc3126ce14911a3dec46ff540a60841ef090898f72c4c6f9b0b825efab ${SAIL_RISCV_ZIP_NAME}"
RUN mkdir -p /tmp/sail-riscv && \
cd /tmp/sail-riscv && \
wget ${SAIL_RISCV_ZIP_URL} && \
echo ${SAIL_RISCV_ZIP_HASH} | sha256sum -c && \
tar -xzf ${SAIL_RISCV_ZIP_NAME} && \
sudo mv sail_riscv-Linux-x86_64/bin/* /usr/local/bin/ && \
cd .. && sudo rm -r /tmp/sail-riscv && \
cd /usr/local/bin && \
sudo mv riscv_sim_rv32d riscv_sim_RV32 && \
sudo mv riscv_sim_rv64d riscv_sim_RV64

# install riscof
USER root
RUN apt update && apt install -y python3 python3-pip && \
pip3 install riscof

# CI needs priviledged access
USER root
65 changes: 65 additions & 0 deletions Dockerfile.riscv-toolchain
Original file line number Diff line number Diff line change
@@ -0,0 +1,65 @@
FROM public.ecr.aws/lts/ubuntu:22.04_stable AS builder

ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d

# update and upgrade
RUN apt update && apt upgrade -y

# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common

# unminimize the system
RUN bash -c "yes | unminimize"

# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers

# build riscv toolchain
RUN sudo apt-get install -y \
autoconf automake autotools-dev curl python3 libmpc-dev libmpfr-dev libgmp-dev gawk \
build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev && \
cd /tmp && \
git clone --recursive https://github.com/riscv/riscv-gnu-toolchain.git && \
git clone --recursive https://github.com/riscv/riscv-opcodes.git && \
cd riscv-gnu-toolchain && \
./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32 && \
sudo make

# main image stage
FROM public.ecr.aws/lts/ubuntu:22.04_stable

ARG DEBIAN_FRONTEND=noninteractive
ARG KEYRING_PATH=/usr/share/keyrings
ARG APT_SOURCES_PATH=/etc/apt/sources.list.d

# update and upgrade
RUN apt update && apt upgrade -y

# install essentialls
RUN apt update && \
apt install -y \
man make build-essential git zsh vim curl wget procps gnupg gnupg2 ca-certificates zip \
software-properties-common

# unminimize the system
RUN bash -c "yes | unminimize"

# create dev sudo user
RUN useradd --create-home dev && \
usermod --append --groups sudo dev && \
apt update && apt install -y sudo && \
echo '%sudo ALL=(ALL) NOPASSWD:ALL' >> /etc/sudoers

# get toolchain artifacts from builder stage
COPY --from=builder /opt/riscv /opt/riscv
ENV PATH="/opt/riscv/bin:${PATH}"

USER dev
34 changes: 34 additions & 0 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,12 @@ TB_UTILS := test/utils.svh

TB_VCD_BASE_PATH := test/vcd

RISCOF_DIR := riscof
RISCOF_DUT_SRC := $(RISCOF_DIR)/dut.sv
RISCOF_DUT_VVP := $(RISCOF_DIR)/dut.vvp
RISCOF_CONFIG_TEMPLATE := $(RISCOF_DIR)/config.ini.m4
RISCOF_CONFIG := $(RISCOF_DIR)/config.ini

build_top: $(OUTPUT)

run_top: $(OUTPUT)
Expand Down Expand Up @@ -53,4 +59,32 @@ run_tb: build_tb
echo "\033[32mAll testbenches passed!\033[0m"; \
fi

$(RISCOF_DUT_VVP): $(SRCS) $(RISCOF_DUT_SRC)
$(IVERILOG) -g2012 -o $(RISCOF_DUT_VVP) $(SRCS) $(RISCOF_DUT_SRC)

$(RISCOF_CONFIG): $(RISCOF_CONFIG_TEMPLATE)
m4 -D M4__WORKSPACE_PATH="$(PWD)" $< > $@

riscof_build_dut: $(RISCOF_DUT_VVP)

riscof_validateyaml: $(RISCOF_CONFIG)
cd $(RISCOF_DIR) && riscof validateyaml --config=config.ini

riscof_clone_archtest: $(RISCOF_CONFIG)
cd $(RISCOF_DIR) && riscof arch-test --clone

riscof_generate_testlist: $(RISCOF_CONFIG)
cd $(RISCOF_DIR) && \
riscof testlist \
--config=config.ini \
--suite=riscv-arch-test/riscv-test-suite/ \
--env=riscv-arch-test/riscv-test-suite/env

riscof_run: $(RISCOF_CONFIG) riscof_build_dut
cd $(RISCOF_DIR) && \
riscof run \
--config=config.ini \
--suite=riscv-arch-test/riscv-test-suite/ \
--env=riscv-arch-test/riscv-test-suite/env

.PHONY: all run testbenches run-tests
15 changes: 15 additions & 0 deletions riscof/config.ini.m4
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
[RISCOF]
ReferencePlugin=sail_cSim
ReferencePluginPath=M4__WORKSPACE_PATH/riscof/sail_cSim
DUTPlugin=utoss_riscv
DUTPluginPath=M4__WORKSPACE_PATH/riscof/utoss_riscv

[utoss_riscv]
PATH=M4__WORKSPACE_PATH/riscof
pluginpath=M4__WORKSPACE_PATH/riscof/utoss_riscv
ispec=M4__WORKSPACE_PATH/riscof/utoss_riscv/utoss_riscv_isa.yaml
pspec=M4__WORKSPACE_PATH/riscof/utoss_riscv/utoss_riscv_platform.yaml
target_run=1

[sail_cSim]
pluginpath=M4__WORKSPACE_PATH/riscof/sail_cSim
97 changes: 97 additions & 0 deletions riscof/dut.sv
Original file line number Diff line number Diff line change
@@ -0,0 +1,97 @@
`timescale 1ns/1ps

`include "test/utils.svh"

module dut;

reg clk;
reg reset;

top #( .MEM_SIZE ( 250000 /* 1MB */ ) )
top
( .clk ( clk )
, .reset ( reset )
);

initial begin
clk = 0;
forever #5 clk = ~clk;
end

initial begin
reset <= `TRUE;
@(posedge clk); #1;
reset <= `FALSE;

fork
watch_tohost();
watch_timeout();
join_any

$finish;
end

task watch_tohost();
integer tohost;
reg [31:0] tohost_data;

$display("%m: waiting for tohost...");
if ($value$plusargs("tohost=%h", tohost)) begin
$display("%m: watching tohost at address <%0d>", tohost);
forever begin
@(posedge clk);
tohost_data = top.memory.M[tohost];
if (tohost_data != 0) begin
$display("%m: memory[tohost] written <%0d> at time %t", tohost_data, $time);
void'(extract_signature());
end
end
end else begin
$display("%m: tohost not specified.");
end
endtask

task watch_timeout();
$display("%m: waiting for timeout...");
repeat (100) @(posedge clk);
$display("%m: timeout reached");
void'(extract_signature());
endtask

function bit extract_signature();
integer begin_signature, end_signature;
string sig_filename;
integer sig_file, i, i_fixed;

if (!$value$plusargs("begin_signature=%h", begin_signature)) begin
$display("%m: begin_signature not specified.");
return 1;
end
if (!$value$plusargs("end_signature=%h", end_signature)) begin
$display("%m: end_signature not specified.");
return 1;
end
if (!$value$plusargs("signature=%s", sig_filename)) begin
$display("%m: signature file not specified.");
return 1;
end

$display("%m: extracting signature from <%0x> to <%0x> to %s", begin_signature, end_signature, sig_file);

sig_file = $fopen(sig_filename, "w");
if (sig_file != 0) begin
for (i = begin_signature; i < end_signature; i = i + 1) begin
$fwrite(sig_file, "%08x\n", top.memory.M[i[31:2]]);
end
$fclose(sig_file);
$display("%m: signature written to %s", sig_filename);
return 0;
end else begin
$display("%m: failed to open signature file %s", sig_filename);
return 1;
end
endfunction

`SETUP_VCD_DUMP(dut)

endmodule
2 changes: 2 additions & 0 deletions riscof/sail_cSim/__init__.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,2 @@
from pkgutil import extend_path
__path__ = extend_path(__path__, __name__)
18 changes: 18 additions & 0 deletions riscof/sail_cSim/env/link.ld
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
OUTPUT_ARCH( "riscv" )
ENTRY(rvtest_entry_point)

SECTIONS
{
. = 0x80000000;
.text.init : { *(.text.init) }
. = ALIGN(0x1000);
.tohost : { *(.tohost) }
. = ALIGN(0x1000);
.text : { *(.text) }
. = ALIGN(0x1000);
.data : { *(.data) }
.data.string : { *(.data.string)}
.bss : { *(.bss) }
_end = .;
}

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