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1cc1d564: s390x: Vector integer and string instruction support
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@mephi42 @rhelmot
mephi42 authored and rhelmot committed Jan 22, 2020
1 parent 4998faa commit 580a45f
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Showing 3 changed files with 49 additions and 16 deletions.
27 changes: 19 additions & 8 deletions priv/ir_defs.c
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Original file line number Diff line number Diff line change
Expand Up @@ -797,6 +797,7 @@ void ppIROp ( IROp op )
case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
case Iop_CmpNEZ128x1: vex_printf("CmpNEZ128x1"); return;

case Iop_Abs8x16: vex_printf("Abs8x16"); return;
case Iop_Abs16x8: vex_printf("Abs16x8"); return;
Expand All @@ -807,6 +808,7 @@ void ppIROp ( IROp op )
case Iop_Add16x8: vex_printf("Add16x8"); return;
case Iop_Add32x4: vex_printf("Add32x4"); return;
case Iop_Add64x2: vex_printf("Add64x2"); return;
case Iop_Add128x1: vex_printf("Add128x1"); return;
case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
Expand All @@ -831,6 +833,7 @@ void ppIROp ( IROp op )
case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
case Iop_PwAddL64Ux2: vex_printf("PwAddL64Ux2"); return;
case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
Expand All @@ -839,6 +842,7 @@ void ppIROp ( IROp op )
case Iop_Sub16x8: vex_printf("Sub16x8"); return;
case Iop_Sub32x4: vex_printf("Sub32x4"); return;
case Iop_Sub64x2: vex_printf("Sub64x2"); return;
case Iop_Sub128x1: vex_printf("Sub128x1"); return;
case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
Expand All @@ -859,8 +863,10 @@ void ppIROp ( IROp op )
case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return;
case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
case Iop_MulHi8Ux16: vex_printf("MulHi8Ux16"); return;
case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
case Iop_MulHi8Sx16: vex_printf("MulHi8Sx16"); return;
case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
Expand All @@ -887,9 +893,11 @@ void ppIROp ( IROp op )
case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
case Iop_Avg64Ux2: vex_printf("Avg64Ux2"); return;
case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
case Iop_Avg64Sx2: vex_printf("Avg64Sx2"); return;

case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
Expand Down Expand Up @@ -937,6 +945,7 @@ void ppIROp ( IROp op )

case Iop_ShlV128: vex_printf("ShlV128"); return;
case Iop_ShrV128: vex_printf("ShrV128"); return;
case Iop_SarV128: vex_printf("SarV128"); return;

case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
Expand Down Expand Up @@ -1592,6 +1601,7 @@ void ppIRJumpKind ( IRJumpKind kind )
case Ijk_SigTRAP: vex_printf("SigTRAP"); break;
case Ijk_SigSEGV: vex_printf("SigSEGV"); break;
case Ijk_SigBUS: vex_printf("SigBUS"); break;
case Ijk_SigFPE: vex_printf("SigFPE"); break;
case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break;
case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break;
case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break;
Expand Down Expand Up @@ -3053,7 +3063,7 @@ void typeOfPrimop ( IROp op,
case Iop_Sub64F0x2:
case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
case Iop_Add8x16: case Iop_Add16x8:
case Iop_Add32x4: case Iop_Add64x2:
case Iop_Add32x4: case Iop_Add64x2: case Iop_Add128x1:
case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
case Iop_QAdd32Ux4: case Iop_QAdd64Ux2:
case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
Expand All @@ -3064,7 +3074,7 @@ void typeOfPrimop ( IROp op,
case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
case Iop_Sub8x16: case Iop_Sub16x8:
case Iop_Sub32x4: case Iop_Sub64x2:
case Iop_Sub32x4: case Iop_Sub64x2: case Iop_Sub128x1:
case Iop_QSub8Ux16: case Iop_QSub16Ux8:
case Iop_QSub32Ux4: case Iop_QSub64Ux2:
case Iop_QSub8Sx16: case Iop_QSub16Sx8:
Expand All @@ -3073,14 +3083,14 @@ void typeOfPrimop ( IROp op,
case Iop_PolynomialMul8x16:
case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4:
case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4:
case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
case Iop_Max64Sx2:
case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
Expand Down Expand Up @@ -3156,11 +3166,12 @@ void typeOfPrimop ( IROp op,
case Iop_Sqrt32F0x4:
case Iop_Sqrt64F0x2:
case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2:
case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
case Iop_Cnt8x16:
case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2:
case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
case Iop_PwAddL64Ux2:
case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
case Iop_Reverse32sIn64_x2:
Expand All @@ -3182,7 +3193,7 @@ void typeOfPrimop ( IROp op,
case Iop_BCD128toI128S:
UNARY(Ity_V128, Ity_V128);

case Iop_ShlV128: case Iop_ShrV128:
case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
case Iop_ShlN8x16: case Iop_ShlN16x8:
case Iop_ShlN32x4: case Iop_ShlN64x2:
case Iop_ShrN8x16: case Iop_ShrN16x8:
Expand Down
17 changes: 9 additions & 8 deletions pub/libvex_ir.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1448,13 +1448,14 @@ typedef
Iop_AndV128, Iop_OrV128, Iop_XorV128,

/* VECTOR SHIFT (shift amt :: Ity_I8) */
Iop_ShlV128, Iop_ShrV128,
Iop_ShlV128, Iop_ShrV128, Iop_SarV128,

/* MISC (vector integer cmp != 0) */
Iop_CmpNEZ8x16, Iop_CmpNEZ16x8, Iop_CmpNEZ32x4, Iop_CmpNEZ64x2,
Iop_CmpNEZ128x1,

/* ADDITION (normal / U->U sat / S->S sat) */
Iop_Add8x16, Iop_Add16x8, Iop_Add32x4, Iop_Add64x2,
Iop_Add8x16, Iop_Add16x8, Iop_Add32x4, Iop_Add64x2, Iop_Add128x1,
Iop_QAdd8Ux16, Iop_QAdd16Ux8, Iop_QAdd32Ux4, Iop_QAdd64Ux2,
Iop_QAdd8Sx16, Iop_QAdd16Sx8, Iop_QAdd32Sx4, Iop_QAdd64Sx2,

Expand All @@ -1469,14 +1470,14 @@ typedef
Iop_QAddExtSUsatUU32x4, Iop_QAddExtSUsatUU64x2,

/* SUBTRACTION (normal / unsigned sat / signed sat) */
Iop_Sub8x16, Iop_Sub16x8, Iop_Sub32x4, Iop_Sub64x2,
Iop_Sub8x16, Iop_Sub16x8, Iop_Sub32x4, Iop_Sub64x2, Iop_Sub128x1,
Iop_QSub8Ux16, Iop_QSub16Ux8, Iop_QSub32Ux4, Iop_QSub64Ux2,
Iop_QSub8Sx16, Iop_QSub16Sx8, Iop_QSub32Sx4, Iop_QSub64Sx2,

/* MULTIPLICATION (normal / high half of signed/unsigned) */
Iop_Mul8x16, Iop_Mul16x8, Iop_Mul32x4,
Iop_MulHi16Ux8, Iop_MulHi32Ux4,
Iop_MulHi16Sx8, Iop_MulHi32Sx4,
Iop_MulHi8Ux16, Iop_MulHi16Ux8, Iop_MulHi32Ux4,
Iop_MulHi8Sx16, Iop_MulHi16Sx8, Iop_MulHi32Sx4,
/* (widening signed/unsigned of even lanes, with lowest lane=zero) */
Iop_MullEven8Ux16, Iop_MullEven16Ux8, Iop_MullEven32Ux4,
Iop_MullEven8Sx16, Iop_MullEven16Sx8, Iop_MullEven32Sx4,
Expand Down Expand Up @@ -1553,7 +1554,7 @@ typedef
Example:
Iop_PwAddL16Ux4( [a,b,c,d] ) = [a+b,c+d]
where a+b and c+d are unsigned 32-bit values. */
Iop_PwAddL8Ux16, Iop_PwAddL16Ux8, Iop_PwAddL32Ux4,
Iop_PwAddL8Ux16, Iop_PwAddL16Ux8, Iop_PwAddL32Ux4, Iop_PwAddL64Ux2,
Iop_PwAddL8Sx16, Iop_PwAddL16Sx8, Iop_PwAddL32Sx4,

/* Other unary pairwise ops */
Expand All @@ -1567,8 +1568,8 @@ typedef
Iop_Abs8x16, Iop_Abs16x8, Iop_Abs32x4, Iop_Abs64x2,

/* AVERAGING: note: (arg1 + arg2 + 1) >>u 1 */
Iop_Avg8Ux16, Iop_Avg16Ux8, Iop_Avg32Ux4,
Iop_Avg8Sx16, Iop_Avg16Sx8, Iop_Avg32Sx4,
Iop_Avg8Ux16, Iop_Avg16Ux8, Iop_Avg32Ux4, Iop_Avg64Ux2,
Iop_Avg8Sx16, Iop_Avg16Sx8, Iop_Avg32Sx4, Iop_Avg64Sx2,

/* MIN/MAX */
Iop_Max8Sx16, Iop_Max16Sx8, Iop_Max32Sx4, Iop_Max64Sx2,
Expand Down
21 changes: 21 additions & 0 deletions useful/test_main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1416,6 +1416,10 @@ static IRAtom* mkPCast64x2 ( MCEnv* mce, IRAtom* at )
return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ64x2, at));
}

static IRAtom* mkPCast128x1 ( MCEnv* mce, IRAtom* at )
{
return assignNew(mce, Ity_V128, unop(Iop_CmpNEZ128x1, at));
}

/* Here's a simple scheme capable of handling ops derived from SSE1
code and while only generating ops that can be efficiently
Expand Down Expand Up @@ -1631,6 +1635,14 @@ IRAtom* binary64Ix2 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
return at;
}

static
IRAtom* binary128Ix1 ( MCEnv* mce, IRAtom* vatom1, IRAtom* vatom2 )
{
IRAtom* at;
at = mkUifUV128(mce, vatom1, vatom2);
at = mkPCast128x1(mce, at);
return at;
}

/*------------------------------------------------------------*/
/*--- Generate shadow values from all kinds of IRExprs. ---*/
Expand Down Expand Up @@ -1674,6 +1686,8 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce,
case Iop_QSub8Ux16:
case Iop_QSub8Sx16:
case Iop_Sub8x16:
case Iop_MulHi8Sx16:
case Iop_MulHi8Ux16:
case Iop_Min8Ux16:
case Iop_Max8Ux16:
case Iop_CmpGT8Sx16:
Expand Down Expand Up @@ -1713,11 +1727,18 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce,
case Iop_Sub64x2:
case Iop_QSub64Ux2:
case Iop_QSub64Sx2:
case Iop_Avg64Ux2:
case Iop_Avg64Sx2:
case Iop_Add64x2:
case Iop_QAdd64Ux2:
case Iop_QAdd64Sx2:
return binary64Ix2(mce, vatom1, vatom2);

case Iop_Add128x1:
case Iop_Sub128x1:
case Iop_CmpNEZ128x1:
return binary128Ix1(mce, vatom1, vatom2);

case Iop_QNarrowBin32Sto16Sx8:
case Iop_QNarrowBin16Sto8Sx16:
case Iop_QNarrowBin16Sto8Ux16:
Expand Down

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