REFACTOR: Change property "desktop_class" to "desktop"

doc/changelog.d/7150.miscellaneous.md

@@ -0,0 +1 @@
+Change property \"desktop_class\" to \"desktop\"

doc/changelog.d/7212.fixed.md

@@ -0,0 +1 @@
+Local access to file in example-data repo

doc/changelog.d/7231.fixed.md

@@ -0,0 +1 @@
+Test Temp dir race condition

doc/source/User_guide/pyaedt_extensions_doc/commandline.rst

@@ -34,8 +34,8 @@ Finally, this code shows how you can run the extension directly from a Python sc
     file_path = "my_file.stl"
     hfss = ansys.aedt.core.Hfss()
     # Specify the AEDT session to connect
-    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop_class.port)
-    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop_class.aedt_version_id
+    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop.port)
+    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop.aedt_version_id
     # Launch extension
     main(
         {

doc/source/User_guide/pyaedt_extensions_doc/project/advanced_fields_calculator.rst

@@ -56,8 +56,8 @@ Finally, this code shows how you can use the Advanced Field Calculator:
     hfss = ansys.aedt.core.Hfss()
 
     # Specify the AEDT session to connect
-    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop_class.port)
-    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop_class.aedt_version_id
+    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop.port)
+    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop.aedt_version_id
 
     # Add an existing expression in the catalog
     name = hfss.post.fields_calculator.add_expression("voltage_line", "Polyline1")

doc/source/User_guide/pyaedt_extensions_doc/templates/getting_started.rst

@@ -35,8 +35,8 @@ The extension can be run from a Python script in the following way:
     hfss = ansys.aedt.core.Hfss()
 
     # Specify the AEDT session to connect
-    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop_class.port)
-    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop_class.aedt_version_id
+    os.environ["PYAEDT_DESKTOP_PORT"] = str(hfss.desktop.port)
+    os.environ["PYAEDT_DESKTOP_VERSION"] = hfss.desktop.aedt_version_id
 
     main({"origin_x": 2, "radius": 6, "is_test": True})
 

src/ansys/aedt/core/application/aedt_objects.py

@@ -114,7 +114,7 @@ def oradfield(self):
             SolutionsHfss.CharacteristicMode,
         ]:
             return self._odesign.GetModule("RadField")
-        if self.desktop_class.aedt_version_id >= "2025.1" and self.design_type == "Q3D Extractor":
+        if self.desktop.aedt_version_id >= "2025.1" and self.design_type == "Q3D Extractor":
             return self._odesign.GetModule("RadField")
         return None
 
@@ -407,12 +407,12 @@ def oeditor(self):
                 self._oeditor = self._odesign.GetEditor("SchematicEditor")
                 if is_linux and settings.aedt_version == "2024.1":  # pragma: no cover
                     time.sleep(1)
-                    self.desktop_class.close_windows()
+                    self.desktop.close_windows()
             elif self.design_type in ["Twin Builder", "Maxwell Circuit", "EMIT"]:
                 self._oeditor = self._odesign.SetActiveEditor("SchematicEditor")
                 if is_linux and settings.aedt_version == "2024.1":  # pragma: no cover
                     time.sleep(1)
-                    self.desktop_class.close_windows()
+                    self.desktop.close_windows()
             elif self.design_type in ["HFSS 3D Layout Design", "HFSS3DLayout"]:
                 self._oeditor = self._odesign.GetEditor("Layout")
             elif self.design_type in [DesignType.MODELCREATION.NAME, DesignType.RMXPRT.NAME]:

src/ansys/aedt/core/application/analysis.py

@@ -1829,7 +1829,7 @@ def analyze_setup(
             )
         if name is None:
             try:
-                if self.desktop_class.aedt_version_id > "2023.1" and self.design_type not in [
+                if self.desktop.aedt_version_id > "2023.1" and self.design_type not in [
                     "RMxprt",
                     "ModelCreation",
                 ]:
@@ -1848,7 +1848,7 @@ def analyze_setup(
                 self.logger.warning("Failed to revert to initial design mesh.")
             try:
                 self.logger.info("Solving design setup %s", name)
-                if self.desktop_class.aedt_version_id > "2023.1" and self.design_type not in [
+                if self.desktop.aedt_version_id > "2023.1" and self.design_type not in [
                     "RMxprt",
                     "ModelCreation",
                 ]:
@@ -1889,7 +1889,7 @@ def are_there_simulations_running(self):
         ----------
         >>> oDesktop.AreThereSimulationsRunning
         """
-        return self.desktop_class.are_there_simulations_running
+        return self.desktop.are_there_simulations_running
 
     @pyaedt_function_handler()
     def get_monitor_data(self):
@@ -1906,7 +1906,7 @@ def get_monitor_data(self):
         ----------
         >>> oDesktop.GetMonitorData
         """
-        return self.desktop_class.get_monitor_data()
+        return self.desktop.get_monitor_data()
 
     @pyaedt_function_handler()
     def stop_simulations(self, clean_stop: bool = True):
@@ -1923,7 +1923,7 @@ def stop_simulations(self, clean_stop: bool = True):
         ----------
         >>> oDesktop.StopSimulations
         """
-        return self.desktop_class.stop_simulations(clean_stop=clean_stop)
+        return self.desktop.stop_simulations(clean_stop=clean_stop)
 
     # flake8: noqa: E501
     @pyaedt_function_handler()
@@ -2103,7 +2103,7 @@ def submit_job(
         ----------
         >>> oDesktop.SubmitJob
         """
-        return self.desktop_class.submit_job(
+        return self.desktop.submit_job(
             self.project_file, cluster_name, aedt_full_exe_path, nodes, cores, wait_for_license, setting_file
         )
 

src/ansys/aedt/core/application/analysis_3d.py

@@ -1258,7 +1258,7 @@ def import_dxf(
 
         """
         input_file = Path(input_file)
-        if self.desktop_class.non_graphical and self.desktop_class.aedt_version_id < "2024.2":  # pragma: no cover
+        if self.desktop.non_graphical and self.desktop.aedt_version_id < "2024.2":  # pragma: no cover
             self.logger.error("Method is supported only in graphical mode.")
             return False
         dxf_layers = get_dxf_layers(input_file)
@@ -1338,7 +1338,7 @@ def import_gds_3d(self, input_file: str, mapping_layers: dict, units: str = "um"
         >>> hfss.import_gds_3d(gds_path, gds_number, units="um", import_method=1)
 
         """
-        if self.desktop_class.non_graphical and self.desktop_class.aedt_version_id < "2024.1":  # pragma: no cover
+        if self.desktop.non_graphical and self.desktop.aedt_version_id < "2024.1":  # pragma: no cover
             self.logger.error("Method is supported only in graphical mode.")
             return False
         if not check_if_path_exists(input_file):

src/ansys/aedt/core/application/analysis_nexxim.py

@@ -160,7 +160,7 @@ def push_down(self, component) -> bool:
         else:
             out_name = component
         try:
-            self.desktop_class.active_design(self.oproject, out_name, self.design_type)
+            self.desktop.active_design(self.oproject, out_name, self.design_type)
             self.__init__(project=self.project_name, design=out_name)
         except Exception:  # pragma: no cover
             return False
@@ -177,7 +177,7 @@ def pop_up(self) -> bool:
         """
         try:
             parent_name = self.odesign.GetName().split(";")[1].split("/")[0]
-            self.desktop_class.active_design(self.oproject, parent_name, self.design_type)
+            self.desktop.active_design(self.oproject, parent_name, self.design_type)
             self.__init__(project=self.project_name, design=parent_name)
         except Exception:
             return False

src/ansys/aedt/core/circuit.py

@@ -229,7 +229,7 @@ def create_schematic_from_netlist(self, input_file: str) -> bool:
         delta = 0.0508
         use_instance = True
         model = []
-        self.desktop_class.close_windows()
+        self.desktop.close_windows()
         autosave = False
         if self._desktop.GetAutoSaveEnabled() == 1:
             self._desktop.EnableAutoSave(False)
@@ -686,7 +686,7 @@ def get_source_pin_names(
         oDesign = oSrcProject.SetActiveDesign(source_design_name)
         if is_linux and settings.aedt_version == "2024.1":  # pragma: no cover
             time.sleep(1)
-            self.desktop_class.close_windows()
+            self.desktop.close_windows()
         tmp_oModule = oDesign.GetModule("BoundarySetup")
         port = None
         if port_selector == 1:
@@ -1637,9 +1637,9 @@ def import_edb_in_circuit(self, input_dir: str | Path) -> CircuitComponent:
             self.logger.error(
                 "Failed to setup co-simulation settings, make sure the simulation setup is properly defined"
             )
-        active_project = hfss.desktop_class.active_project(hfss.project_name)
+        active_project = hfss.desktop.active_project(hfss.project_name)
         active_project.CopyDesign(hfss.design_name)
-        active_project = hfss.desktop_class.active_project(self.project_name)
+        active_project = hfss.desktop.active_project(self.project_name)
         active_project.Paste()
         hfss_3d_layout_model = self.modeler.schematic.add_subcircuit_3dlayout(hfss.design_name)
         hfss.close_project(save=False)

src/ansys/aedt/core/emit_core/results/results.py

@@ -57,7 +57,7 @@ def __init__(self, emit_obj) -> None:
         self.revisions = []
         """List of all result revisions. Only one loaded at a time"""
 
-        self.design = emit_obj.desktop_class.active_design(emit_obj.odesktop.GetActiveProject())
+        self.design = emit_obj.desktop.active_design(emit_obj.odesktop.GetActiveProject())
         """Active design for the EMIT project."""
 
         self.aedt_version = int(self.emit_project.aedt_version_id[-3:])
@@ -271,9 +271,7 @@ def analyze(self):
             # no changes since last created revision, load it
             elif (
                 self.revisions[-1].revision_number
-                == self.emit_project.desktop_class.active_design(
-                    self.emit_project.desktop_class.active_project()
-                ).GetRevision()
+                == self.emit_project.desktop.active_design(self.emit_project.desktop.active_project()).GetRevision()
             ):
                 self.get_revision(self.revisions[-1].name)
             else:

src/ansys/aedt/core/examples/downloads.py

@@ -115,13 +115,24 @@ def _copy_local_example(
     source_relative_path: str,
     target_path: str | Path | None = None,
 ) -> Path:  # pragma: no cover
-    """Copy a folder from a local copy of the examples repo."""
-    dst = Path(target_path) / Path(source_relative_path).name
+    """Copy a file or folder from a local copy of the examples repo."""
+    pyaedt_logger.debug(f"Retrieving local example from '{settings.local_example_folder}'")
+    source = Path(settings.local_example_folder) / source_relative_path
+    target_path = Path(target_path)
+
+    if source.is_file():
+        target_path.mkdir(parents=True, exist_ok=True)
+        dst = target_path / source.name
+        try:
+            shutil.copy2(source, dst)
+        except Exception as e:
+            raise AEDTRuntimeError(f"Failed to copy {str(source)}.") from e
+        return dst
+
+    dst = target_path / Path(source_relative_path).name
     dst.mkdir(parents=True, exist_ok=True)
-    pyaedt_logger.debug(f"Retrieving local folder from '{settings.local_example_folder}'")
-    source_folder = Path(settings.local_example_folder) / source_relative_path
-    for p in source_folder.rglob("*"):
-        target = dst / p.relative_to(source_folder)
+    for p in source.rglob("*"):
+        target = dst / p.relative_to(source)
         if p.is_dir():
             target.mkdir(parents=True, exist_ok=True)
         else:

src/ansys/aedt/core/extensions/hfss/mcad_assembly.py

@@ -192,7 +192,7 @@ def run(self, config_data) -> None:
         del app
 
         if "PYTEST_CURRENT_TEST" not in os.environ:  # pragma: no cover
-            hfss.desktop_class.release_desktop(False, False)
+            hfss.desktop.release_desktop(False, False)
         else:
             hfss.close_project(save=False)
         return

src/ansys/aedt/core/extensions/hfss3dlayout/parametrize_edb.py

@@ -397,7 +397,7 @@ def main(data: ParametrizeEdbExtensionData) -> bool:
     if "PYTEST_CURRENT_TEST" not in os.environ:
         h3d = Hfss3dLayout(str(new_project_aedb))
         h3d.logger.info("Parametric project generated successfully.")
-        h3d.desktop_class.release_desktop(False, False)
+        h3d.desktop.release_desktop(False, False)
 
     return True
 

src/ansys/aedt/core/extensions/hfss3dlayout/post_layout_design.py

@@ -388,7 +388,7 @@ def main(data: PostLayoutDesignExtensionData) -> bool:
             # Open new project with micro vias
             new_h3d = ansys.aedt.core.Hfss3dLayout(project=new_edb_path)
             if "PYTEST_CURRENT_TEST" not in os.environ:
-                new_h3d.desktop_class.release_desktop(False, False)
+                new_h3d.desktop.release_desktop(False, False)
 
         else:
             raise AEDTRuntimeError(f"Unknown action: {data.action}")

src/ansys/aedt/core/extensions/hfss3dlayout/resources/configure_layout/master_ui.py

@@ -195,7 +195,7 @@ def export_config_from_edb(self):
     def load_edb_into_hfss3dlayout(self, edb_path: str | Path):
         app = ansys.aedt.core.Hfss3dLayout(project=str(edb_path), **self.aedt_info.model_dump())
         if "PYTEST_CURRENT_TEST" not in os.environ:  # pragma: no cover
-            app.desktop_class.release_desktop(False, False)
+            app.desktop.release_desktop(False, False)
         else:
             app.close_project(save=False)
         return app

src/ansys/aedt/core/extensions/hfss3dlayout/via_clustering.py

@@ -213,7 +213,7 @@ def add_drawing_layer() -> None:
             )
             layer = hfss.modeler.stackup.add_layer("via_merging")
             layer.usp = True
-            hfss.desktop_class.release_desktop(False, False)
+            hfss.desktop.release_desktop(False, False)
 
         def callback_merge_vias(extension: ViaClusteringExtension):
             """Callback for merging via instances."""
@@ -228,7 +228,7 @@ def callback_merge_vias(extension: ViaClusteringExtension):
             primitives = hfss.modeler.objects_by_layer(layer="via_merging")
             if not primitives:
                 messagebox.showwarning(message="No primitives found on layer defined for merging padstack instances.")
-                hfss.desktop_class.release_desktop(False, False)
+                hfss.desktop.release_desktop(False, False)
                 extension.release_desktop()
                 raise AEDTRuntimeError("No primitives found on layer defined for merging padstack instances.")
 
@@ -260,7 +260,7 @@ def callback_merge_vias(extension: ViaClusteringExtension):
                 contour_list=contour_list,
             )
             extension.data = via_clustering_data
-            hfss.desktop_class.release_desktop(False, False)
+            hfss.desktop.release_desktop(False, False)
             extension.root.destroy()
 
         button_add_layer = ttk.Button(
@@ -326,7 +326,7 @@ def main(data: ViaClusteringExtensionData) -> bool:
     if "PYTEST_CURRENT_TEST" not in os.environ:  # pragma: no cover
         h3d = Hfss3dLayout(new_aedb_path)
         h3d.logger.info("Project generated correctly.")
-        h3d.desktop_class.release_desktop(False, False)
+        h3d.desktop.release_desktop(False, False)
 
     return True
 

src/ansys/aedt/core/extensions/hfss3dlayout/via_design.py

@@ -199,7 +199,7 @@ def create_design(self, create_design_path: Path | None = None):
         )
 
         if "PYTEST_CURRENT_TEST" not in os.environ:
-            hfss_3d.desktop_class.release_desktop(False, False)
+            hfss_3d.desktop.release_desktop(False, False)
         return True
 
     @property

src/ansys/aedt/core/generic/configurations.py

@@ -2123,7 +2123,7 @@ def apply_operations_to_native_components(obj, operation_dict, native_dict) -> b
                     native = NativeComponentPCB(self._app, native_dict["Type"], native_name, nc_dict)
                 else:
                     native = NativeComponentObject(self._app, native_dict["Type"], native_name, nc_dict)
-                prj_list = set(self._app.desktop_class.project_list)
+                prj_list = set(self._app.desktop.project_list)
                 definition_names = set(self._app.oeditor.Get3DComponentDefinitionNames())
                 instance_names = {
                     def_name: set(self._app.oeditor.Get3DComponentInstanceNames(def_name))
@@ -2152,7 +2152,7 @@ def apply_operations_to_native_components(obj, operation_dict, native_dict) -> b
                 if nc_dict["NativeComponentDefinitionProvider"]["Type"] == "PCB" and nc_dict[
                     "NativeComponentDefinitionProvider"
                 ]["DefnLink"]["Project"] not in [self._app.project_file or "This Project*"]:
-                    prj = list(set(self._app.desktop_class.project_list) - prj_list)[0]
+                    prj = list(set(self._app.desktop.project_list) - prj_list)[0]
                     design = nc_dict["NativeComponentDefinitionProvider"]["DefnLink"]["Design"]
                     from ansys.aedt.core.generic.design_types import get_pyaedt_app
 

src/ansys/aedt/core/hfss.py

@@ -2715,7 +2715,7 @@ def create_sbr_custom_array_file(
         >>> from ansys.aedt.core import Hfss
         >>> hfss = Hfss()
         >>> hfss.create_sbr_custom_array_file()
-        >>> hfss.desktop_class.close_desktop()
+        >>> hfss.desktop.close_desktop()
         """
         if output_file is None:
             output_file = Path(self.working_directory) / "custom_array.sarr"
@@ -6231,7 +6231,7 @@ def set_phase_center_per_port(self, coordinate_system: list = None) -> bool:
         >>> hfss.set_phase_center_per_port(["Global", "Global"])
 
         """
-        if not self.desktop_class.is_grpc_api:  # pragma: no cover
+        if not self.desktop.is_grpc_api:  # pragma: no cover
             raise AEDTRuntimeError("Set phase center is not supported by AEDT COM API. Set phase center manually.")
 
         port_names = self.ports[::]
@@ -6489,7 +6489,7 @@ def lumped_port(
             self.solution_type == SolutionsHfss.DrivenModal
             or (
                 self.solution_type in [SolutionsHfss.DrivenTerminal, SolutionsHfss.Transient]
-                and self.desktop_class.aedt_version_id >= "2024.1"
+                and self.desktop.aedt_version_id >= "2024.1"
             )
             and not reference
         ):
@@ -6695,7 +6695,7 @@ def wave_port(
             self.solution_type == SolutionsHfss.DrivenModal
             or (
                 self.solution_type in [SolutionsHfss.DrivenTerminal, SolutionsHfss.Transient]
-                and self.desktop_class.aedt_version_id >= "2024.1"
+                and self.desktop.aedt_version_id >= "2024.1"
             )
             and not reference
         ):

src/ansys/aedt/core/hfss3dlayout.py

@@ -785,8 +785,8 @@ def import_edb(self, input_folder: str | Path) -> bool:
             input_folder = Path(input_folder) / "edb.def"
         self.oimport_export.ImportEDB(str(input_folder))
         self._close_edb()
-        project_name = self.desktop_class.active_project().GetName()
-        design_name = self.desktop_class.active_design(self.desktop_class.active_project()).GetName().split(";")[-1]
+        project_name = self.desktop.active_project().GetName()
+        design_name = self.desktop.active_design(self.desktop.active_project()).GetName().split(";")[-1]
         self.__init__(project=project_name, design=design_name)
         return True
 
@@ -2073,7 +2073,7 @@ def enable_rigid_flex(self) -> bool:
         """
         if settings.aedt_version >= "2022.2":
             self.modeler.oeditor.ProcessBentModelCmd()
-        if self.desktop_class.non_graphical:
+        if self.desktop.non_graphical:
             return True
         return True if self.variable_manager["BendModel"].expression == "1" else False