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Layout root graph#1515

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sbillig:layout-hole-eval
Open

Layout root graph#1515
sbillig wants to merge 15 commits into
argotorg:masterfrom
sbillig:layout-hole-eval

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@sbillig sbillig commented Jul 9, 2026

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Replaces layout-hole handling type/provenance-based layout hole (aka const hole, eg const SALT: usize = _ ) inference to an explicit layout-root graph and layout-evidence ABI.

Each source layout parameter now has a stable identity, and each structural occurrence receives its own
slot assignment. Evidence is carried through HIR and MIR instead of being reconstructed later from types or provenance.

Bug fixes

  • Fixed issue where repeated instances of a hole-bearing type within a single contract field would be assigned the same slot number. Eg maps: (StorageMap<u256, u256>, StorageMap<u256, u256>).
  • Reserves explicit layout parameters before assigning inferred ones. Mixed layouts such as an explicit SALT = 1 followed by inferred maps can no longer collide, while intentionally duplicated explicit parameters still
    share.
  • Correctly lays out static arrays of hole-bearing types, including nested and multidimensional arrays, using
    checked indexed root families.
  • Preserves runtime bounds checks for dynamically indexed layout-only or zero-sized array elements.
  • Rejects unresolved, ambiguous, overflowing, cyclic, or otherwise invalid layouts atomically instead of
    producing provisional or aliased layouts.

Storage layout LSP hover

Contract-name hover now shows the complete contract layout, grouped under Storage, Transient Storage, Immutable (code). Example:

struct CounterStore { global: u256, counts: StorageMap<Address, u256> }

// The contract itself: declares its storage and handles messages.
pub contract Counter uses (ctx: Ctx) {
    mut store: CounterStore,
    mut table: [[u256; 2]; 4],
    mut baz: Mutex<StorageMap<u256, u256, 0>,

shows:

Storage
  0: baz.value.SALT (explicit parameter, u256)
  1: store.global (inline field, u256)
  2: store.counts.SALT (inferred parameter, u256)
  3 + i0*2 + i1 (i0: 0..4, i1: 0..2): table[i0][i1] (inline field, u256)
  
Transient Storage
  0: baz.lock.SLOT (inferred parameter, u256)

Field hover shows the entries belonging to that field. Array layouts include their index formula and
dimensions, and invalid or blocked layouts explain why no assignment is available.

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💡 Codex Review

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Reviewed commit: 954898ca67

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Comment thread crates/hir/src/analysis/ty/ty_lower.rs Outdated
Comment thread crates/hir/src/core/semantic/mod.rs Outdated
@sbillig
sbillig force-pushed the layout-hole-eval branch 2 times, most recently from e489c96 to fc6226a Compare July 12, 2026 03:06
sbillig added 5 commits July 14, 2026 07:28
Replace structural layout holes with stable source and landing roots plus transactional contract allocation. Model provider targets, arrays, enum overlays, address spaces, and explicit or inferred reservations in one root graph.

Derive canonical layout bundle signatures and carry affine layout evidence explicitly through semantic IR, calls, returns, effects, and MIR. Remove provenance-derived source analysis, hidden-ABI liveness, and callable interface reconstruction.

Include the diagnostics and correctness fixes exposed by the hard cutover.
@sbillig
sbillig force-pushed the layout-hole-eval branch from fc6226a to ee8ac92 Compare July 14, 2026 15:38
@sbillig

sbillig commented Jul 15, 2026

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Codex Review: Didn't find any major issues. Swish!

Reviewed commit: 4379625361

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  • Open a pull request for review
  • Mark a draft as ready
  • Comment "@codex review".

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sbillig added 2 commits July 15, 2026 13:43
Centralize HIR, dependency, and MIR diagnostic ordering so invalid roots stop before dependency analysis and dependency failures stop before MIR analysis. Treat immutable embedded core and std ingots as prevalidated while retaining validation for source dependencies and builtin replacements, and strengthen the whole-library validation tests to cover MIR diagnostics.
@sbillig sbillig changed the title Layout hole eval Layout root graph Jul 16, 2026
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