class AswinRochJ:
def __init__(self):
self.name = "Aswin Roch J"
self.location = "KanyaKumari, Tamil Nadu ๐ฎ๐ณ"
self.degree = "B.E. Electronics & Communication Engineering"
self.college = "St. Joseph's College of Engineering, Chennai"
self.cgpa = 8.96
self.stack = [
"Embedded Systems", "IoT", "VLSI / Verilog HDL",
"Python", "Java", "PCB Design (EasyEDA, Altium)"
]
self.currently_learning = [
"Advanced Verilog & FPGA Design",
"Raspberry Pi + Edge AI",
"ROS2 & Autonomous Systems",
"Machine Learning for IoT"
]
self.fun_fact = "I once built a scam detection engine before my 2nd semester ๐"
def motto(self):
return "Build. Break. Learn. Repeat. ๐ง"
me = AswinRochJ()
print(me.motto())Languages
Hardware & EDA Tools
Platforms & IoT
Cloud & Databases
Automation & Productivity
๐ข Bevywise Technologies โ Embedded Systems Intern | 2024
- ๐ Designed and deployed an ESP32-based IoT smart door lock system end-to-end โ from PCB schematic to physical layout using EasyEDA
- ๐ ๏ธ Handled full hardware pipeline: component selection, schematic capture, PCB routing, and on-device firmware integration
- ๐ก Integrated wireless connectivity for remote lock control with real-time state feedback
๐ข Zerlon Semi โ Digital Design Intern | 2024
- ๐ง Leveraged Vivado & EDA Playground to simulate and verify digital designs, building hands-on expertise in digital and analog electronics
- โก Verified RTL designs through testbench simulation, timing analysis, and waveform debugging
- ๐ Gained deep exposure to FPGA-based synthesis flows and hardware description best practices
| Project | Stack | Highlights |
|---|---|---|
| ๐ Elevator Control System | Verilog HDL ยท Vivado ยท FPGA | Engineered a DCS-algorithm-based controller with intelligent scheduling logic, 7-segment display integration, and optimized power efficiency |
| ๐ Scam Detection โ Behavioral Intelligence | Python ยท ML ยท Network Analysis | Real-time scam detection engine with risk scoring, identity signal analysis, and intent detection for secure communications |
| ๐ฅ AI Smart Telehealth Kiosk | Python ยท AI ยท Voice Input ยท IoT | AI-powered rural healthcare kiosk with voice symptom analysis and live doctor connectivity โ bridging the last-mile healthcare gap |
| ๐ | Achievement | Details |
|---|---|---|
| ๐ฅ | TN Police Cyber Security Hackathon | Winner โ Competed against statewide teams in cybersecurity innovation |
| ๐ฏ | Smart India Hackathon | Shortlisted โ Selected among the top teams in national-level SIH screening |
| ๐ | Oracle AI Foundation Associate | Certified AI Foundation Associate โ Oracle University |
| ๐ก | IoT Masterclass | Certified โ NoviTech Institute |
| โก | Electronics Mastery | Certified โ LMES Foundation |
| ๐งฎ | Abacus Competition | Winner โ Secured top position in competitive mental arithmetic |
| ๐ | Quiz Competition (12th Grade) | 1st Place โ Won inter-school quiz competition |
| Degree | Institution | Year | Score |
|---|---|---|---|
| ๐ B.E. Electronics & Communication Engineering | St. Joseph's College of Engineering, Chennai | 2024 โ Present | CGPA: 8.96 |
| ๐ HSC (Class XII) | Carmel Hr Sec School | 2024 | 92.6% |
| ๐ SSLC (Class X) | SM Matric Hr Sec School | 2022 | 93% |
๐ง FPGA & Advanced Verilog โ Timing Constraints ยท Place & Route ยท Synthesis Optimization
๐ค Edge AI & Embedded ML โ TensorFlow Lite ยท Raspberry Pi 5 ยท Model Quantization
๐ Autonomous Systems โ ROS2 ยท LiDAR ยท Ackermann Steering ยท AWS DeepRacer
๐ IoT & Cloud Integration โ Firebase ยท MQTT ยท LoRa ยท Offline Mesh Networks
๐ก๏ธ Cybersecurity Hardware โ Side-Channel Analysis ยท Secure Boot ยท Hardware Cryptography
