Partial support for no_std in cranelift_codegen

.github/workflows/main.yml

@@ -551,6 +551,7 @@ jobs:
             cargo check -p wasmtime --no-default-features --features runtime,gc,component-model,async,debug-builtins &&
             cargo check -p cranelift-control --no-default-features &&
             cargo check -p cranelift-assembler-x64 --lib &&
+            cargo check -p cranelift-codegen --no-default-features -F x86,arm64 &&
             cargo check -p pulley-interpreter --features encode,decode,disas,interp &&
             cargo check -p wasmtime-wasi-io --no-default-features
         # Use `cross` for illumos to have a C compiler/linker available.

Cargo.toml

@@ -304,7 +304,7 @@ cranelift-jit = { path = "cranelift/jit", version = "0.129.0" }
 cranelift-fuzzgen = { path = "cranelift/fuzzgen" }
 cranelift-bforest = { path = "cranelift/bforest", version = "0.129.0" }
 cranelift-bitset = { path = "cranelift/bitset", version = "0.129.0" }
-cranelift-control = { path = "cranelift/control", version = "0.129.0" }
+cranelift-control = { path = "cranelift/control", version = "0.129.0", default-features = false }
 cranelift-srcgen = { path = "cranelift/srcgen", version = "0.129.0" }
 cranelift = { path = "cranelift/umbrella", version = "0.129.0" }
 
@@ -322,7 +322,7 @@ component-async-tests = { path = "crates/misc/component-async-tests" }
 
 # Bytecode Alliance maintained dependencies:
 # ---------------------------
-regalloc2 = "0.13.3"
+regalloc2 = { version = "0.13.3", default-features = false }
 wasip1 = { version = "1.0.0", default-features = false }
 
 # cap-std family:
@@ -414,7 +414,7 @@ tracing-subscriber = { version = "0.3.20", default-features = false, features =
 url = "2.5.7"
 postcard = { version = "1.1.3", default-features = false, features = ['alloc'] }
 criterion = { version = "0.7.0", default-features = false, features = ["html_reports", "rayon"] }
-rustc-hash = "2.1.1"
+rustc-hash = { version = "2.1.1", default-features = false }
 libtest-mimic = "0.8.1"
 semver = { version = "1.0.27", default-features = false }
 ittapi = "0.4.0"

cranelift/codegen/Cargo.toml

@@ -30,20 +30,21 @@ cranelift-entity = { workspace = true }
 cranelift-bforest = { workspace = true }
 cranelift-bitset = { workspace = true }
 cranelift-control = { workspace = true }
-hashbrown = { workspace = true }
+hashbrown = { workspace = true, features = ["default-hasher"] }
 target-lexicon = { workspace = true }
 log = { workspace = true }
 serde = { workspace = true, optional = true }
 serde_derive = { workspace = true, optional = true }
 pulley-interpreter = { workspace = true, optional = true }
 postcard = { workspace = true, optional = true }
-gimli = { workspace = true, features = ["write", "std"], optional = true }
+gimli = { workspace = true, features = ["write"], optional = true }
 smallvec = { workspace = true }
 regalloc2 = { workspace = true, features = ["checker"] }
 souper-ir = { version = "2.1.0", optional = true }
 sha2 = { version = "0.10.2", optional = true }
 rustc-hash = { workspace = true }
 wasmtime-math = { workspace = true }
+libm = { workspace = true, features = ["unstable-public-internals"] }
 # It is a goal of the cranelift-codegen crate to have minimal external dependencies.
 # Please don't add any unless they are essential to the task of creating binary
 # machine code. Integration tests that need external dependencies can be
@@ -65,7 +66,7 @@ default = ["std", "unwind", "host-arch", "timing"]
 # The "std" feature enables use of libstd. The "core" feature enables use
 # of some minimal std-like replacement libraries. At least one of these two
 # features need to be enabled.
-std = ["serde?/std"]
+std = ["serde?/std", "rustc-hash/std", "gimli/std", "cranelift-control/fuzz"]
 
 # The "core" feature used to enable a hashmap workaround, but is now
 # deprecated (we (i) always use hashbrown, and (ii) don't support a

cranelift/codegen/src/alias_analysis.rs

@@ -61,6 +61,7 @@
 //! must be correct likely reduce the potential benefit, we don't yet
 //! do this.
 
+use crate::{FxHashMap, FxHashSet};
 use crate::{
     cursor::{Cursor, FuncCursor},
     dominator_tree::DominatorTree,
@@ -71,7 +72,6 @@ use crate::{
     trace,
 };
 use cranelift_entity::{EntityRef, packed_option::PackedOption};
-use rustc_hash::{FxHashMap, FxHashSet};
 
 /// For a given program point, the vector of last-store instruction
 /// indices for each disjoint category of abstract state.

cranelift/codegen/src/egraph/elaborate.rs

@@ -11,10 +11,10 @@ use crate::ir::{Block, Function, Inst, Value, ValueDef};
 use crate::loop_analysis::{Loop, LoopAnalysis};
 use crate::scoped_hash_map::ScopedHashMap;
 use crate::trace;
+use crate::{FxHashMap, FxHashSet};
 use alloc::vec::Vec;
 use cranelift_control::ControlPlane;
 use cranelift_entity::{EntitySet, SecondaryMap, packed_option::ReservedValue};
-use rustc_hash::{FxHashMap, FxHashSet};
 use smallvec::{SmallVec, smallvec};
 
 pub(crate) struct Elaborator<'a> {

cranelift/codegen/src/egraph.rs → cranelift/codegen/src/egraph/mod.rs

@@ -1,5 +1,6 @@
 //! Support for egraphs represented in the DataFlowGraph.
 
+use crate::FxHashSet;
 use crate::alias_analysis::{AliasAnalysis, LastStores};
 use crate::ctxhash::{CtxEq, CtxHash, NullCtx};
 use crate::cursor::{Cursor, CursorPosition, FuncCursor};
@@ -24,7 +25,6 @@ use core::hash::Hasher;
 use cranelift_control::ControlPlane;
 use cranelift_entity::SecondaryMap;
 use cranelift_entity::packed_option::ReservedValue;
-use rustc_hash::FxHashSet;
 use smallvec::SmallVec;
 
 mod cost;

cranelift/codegen/src/ir/immediates.rs

@@ -10,6 +10,7 @@ use core::fmt::{self, Display, Formatter};
 use core::ops::{Add, BitAnd, BitOr, BitXor, Div, Mul, Neg, Not, Sub};
 use core::str::FromStr;
 use core::{i32, u32};
+use libm::Libm;
 #[cfg(feature = "enable-serde")]
 use serde_derive::{Deserialize, Serialize};
 
@@ -682,28 +683,28 @@ macro_rules! ieee_float {
             $(
                 /// Returns the square root of `self`.
                 pub fn sqrt(self) -> Self {
-                    Self::with_float(self.$as_float().sqrt())
+                    Self::with_float(Libm::<$float_ty>::sqrt(self.$as_float()))
                 }
 
                 /// Returns the smallest integer greater than or equal to `self`.
                 pub fn ceil(self) -> Self {
-                    Self::with_float(self.$as_float().ceil())
+                    Self::with_float(Libm::<$float_ty>::ceil(self.$as_float()))
                 }
 
                 /// Returns the largest integer less than or equal to `self`.
                 pub fn floor(self) -> Self {
-                    Self::with_float(self.$as_float().floor())
+                    Self::with_float(Libm::<$float_ty>::floor(self.$as_float()))
                 }
 
                 /// Returns the integer part of `self`. This means that non-integer numbers are always truncated towards zero.
                 pub fn trunc(self) -> Self {
-                    Self::with_float(self.$as_float().trunc())
+                    Self::with_float(Libm::<$float_ty>::trunc(self.$as_float()))
                 }
 
                 /// Returns the nearest integer to `self`. Rounds half-way cases to the number
                 /// with an even least significant digit.
                 pub fn round_ties_even(self) -> Self {
-                    Self::with_float(self.$as_float().round_ties_even())
+                    Self::with_float(libm::generic::rint_round(self.$as_float(), libm::support::Round::Nearest).val)
                 }
             )?
         }

cranelift/codegen/src/isa/aarch64/abi.rs

@@ -17,7 +17,6 @@ use alloc::boxed::Box;
 use alloc::vec::Vec;
 use regalloc2::{MachineEnv, PReg, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use std::sync::OnceLock;
 
 // We use a generic implementation that factors out AArch64 and x64 ABI commonalities, because
 // these ABIs are very similar.
@@ -1087,13 +1086,11 @@ impl ABIMachineSpec for AArch64MachineDeps {
         }
     }
 
-    fn get_machine_env(flags: &settings::Flags, _call_conv: isa::CallConv) -> &MachineEnv {
+    fn get_machine_env(flags: &settings::Flags, _call_conv: isa::CallConv) -> MachineEnv {
         if flags.enable_pinned_reg() {
-            static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-            MACHINE_ENV.get_or_init(|| create_reg_env(true))
+            create_reg_env(true)
         } else {
-            static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-            MACHINE_ENV.get_or_init(|| create_reg_env(false))
+            create_reg_env(false)
         }
     }
 

cranelift/codegen/src/isa/pulley_shared/abi.rs

@@ -15,7 +15,6 @@ use core::marker::PhantomData;
 use cranelift_bitset::ScalarBitSet;
 use regalloc2::{MachineEnv, PReg, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use std::sync::OnceLock;
 
 /// Support for the Pulley ABI from the callee side (within a function body).
 pub(crate) type PulleyCallee<P> = Callee<PulleyMachineDeps<P>>;
@@ -474,9 +473,8 @@ where
         }
     }
 
-    fn get_machine_env(_flags: &settings::Flags, _call_conv: isa::CallConv) -> &MachineEnv {
-        static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-        MACHINE_ENV.get_or_init(create_reg_environment)
+    fn get_machine_env(_flags: &settings::Flags, _call_conv: isa::CallConv) -> MachineEnv {
+        create_reg_environment()
     }
 
     fn get_regs_clobbered_by_call(

cranelift/codegen/src/isa/riscv64/abi.rs

@@ -21,7 +21,6 @@ use regalloc2::{MachineEnv, PReg, PRegSet};
 
 use alloc::borrow::ToOwned;
 use smallvec::{SmallVec, smallvec};
-use std::sync::OnceLock;
 
 /// Support for the Riscv64 ABI from the callee side (within a function body).
 pub(crate) type Riscv64Callee = Callee<Riscv64MachineDeps>;
@@ -612,9 +611,8 @@ impl ABIMachineSpec for Riscv64MachineDeps {
         }
     }
 
-    fn get_machine_env(_flags: &settings::Flags, _call_conv: isa::CallConv) -> &MachineEnv {
-        static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-        MACHINE_ENV.get_or_init(create_reg_environment)
+    fn get_machine_env(_flags: &settings::Flags, _call_conv: isa::CallConv) -> MachineEnv {
+        create_reg_environment()
     }
 
     fn get_regs_clobbered_by_call(

cranelift/codegen/src/isa/s390x/abi.rs

@@ -148,7 +148,6 @@ use alloc::borrow::ToOwned;
 use alloc::vec::Vec;
 use regalloc2::{MachineEnv, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use std::sync::OnceLock;
 
 // We use a generic implementation that factors out ABI commonalities.
 
@@ -904,16 +903,10 @@ impl ABIMachineSpec for S390xMachineDeps {
         }
     }
 
-    fn get_machine_env(_flags: &settings::Flags, call_conv: isa::CallConv) -> &MachineEnv {
+    fn get_machine_env(_flags: &settings::Flags, call_conv: isa::CallConv) -> MachineEnv {
         match call_conv {
-            isa::CallConv::Tail => {
-                static TAIL_MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-                TAIL_MACHINE_ENV.get_or_init(tail_create_machine_env)
-            }
-            _ => {
-                static SYSV_MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-                SYSV_MACHINE_ENV.get_or_init(sysv_create_machine_env)
-            }
+            isa::CallConv::Tail => tail_create_machine_env(),
+            _ => sysv_create_machine_env(),
         }
     }
 

cranelift/codegen/src/isa/unwind.rs

@@ -14,6 +14,7 @@ pub mod winx64;
 #[cfg(feature = "unwind")]
 pub mod winarm64;
 
+#[cfg(feature = "unwind")]
 /// CFA-based unwind information used on SystemV.
 pub type CfaUnwindInfo = systemv::UnwindInfo;
 

cranelift/codegen/src/isa/x64/abi.rs

@@ -16,7 +16,6 @@ use args::*;
 use cranelift_assembler_x64 as asm;
 use regalloc2::{MachineEnv, PReg, PRegSet};
 use smallvec::{SmallVec, smallvec};
-use std::sync::OnceLock;
 
 /// Support for the x64 ABI from the callee side (within a function body).
 pub(crate) type X64Callee = Callee<X64ABIMachineSpec>;
@@ -873,13 +872,11 @@ impl ABIMachineSpec for X64ABIMachineSpec {
         }
     }
 
-    fn get_machine_env(flags: &settings::Flags, _call_conv: isa::CallConv) -> &MachineEnv {
+    fn get_machine_env(flags: &settings::Flags, _call_conv: isa::CallConv) -> MachineEnv {
         if flags.enable_pinned_reg() {
-            static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-            MACHINE_ENV.get_or_init(|| create_reg_env_systemv(true))
+            create_reg_env_systemv(true)
         } else {
-            static MACHINE_ENV: OnceLock<MachineEnv> = OnceLock::new();
-            MACHINE_ENV.get_or_init(|| create_reg_env_systemv(false))
+            create_reg_env_systemv(false)
         }
     }
 

cranelift/codegen/src/isa/x64/mod.rs

@@ -28,6 +28,7 @@ mod lower;
 mod pcc;
 pub mod settings;
 
+#[cfg(feature = "unwind")]
 pub use inst::unwind::systemv::create_cie;
 
 /// An X64 backend.
@@ -217,6 +218,7 @@ pub fn emit_unwind_info(
 ) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
     use crate::isa::unwind::{UnwindInfo, UnwindInfoKind};
     Ok(match kind {
+        #[cfg(feature = "unwind")]
         UnwindInfoKind::SystemV => {
             let mapper = self::inst::unwind::systemv::RegisterMapper;
             Some(UnwindInfo::SystemV(
@@ -227,6 +229,7 @@ pub fn emit_unwind_info(
                 )?,
             ))
         }
+        #[cfg(feature = "unwind")]
         UnwindInfoKind::Windows => Some(UnwindInfo::WindowsX64(
             crate::isa::unwind::winx64::create_unwind_info_from_insts::<
                 self::inst::unwind::winx64::RegisterMapper,

cranelift/codegen/src/lib.rs

@@ -14,6 +14,7 @@
     allow(dead_code, reason = "see comment above")
 )]
 
+#[macro_use]
 extern crate alloc;
 
 #[cfg(feature = "std")]
@@ -23,7 +24,12 @@ extern crate std;
 #[cfg(not(feature = "std"))]
 use hashbrown::{HashMap, HashSet, hash_map};
 #[cfg(feature = "std")]
-use std::collections::{HashMap, hash_map};
+use std::collections::{HashMap, HashSet, hash_map};
+
+/// Type alias for a hash map that uses the Fx hashing algorithm.
+pub type FxHashMap<K, V> = HashMap<K, V, rustc_hash::FxBuildHasher>;
+/// Type alias for a hash set that uses the Fx hashing algorithm.
+pub type FxHashSet<V> = HashSet<V, rustc_hash::FxBuildHasher>;
 
 pub use crate::context::Context;
 pub use crate::value_label::{LabelValueLoc, ValueLabelsRanges, ValueLocRange};

cranelift/codegen/src/machinst/abi.rs

@@ -99,6 +99,7 @@
 //! ABI. See each platform's `abi.rs` implementation for details.
 
 use crate::CodegenError;
+use crate::FxHashMap;
 use crate::HashMap;
 use crate::entity::SecondaryMap;
 use crate::ir::{ArgumentExtension, ArgumentPurpose, ExceptionTag, Signature};
@@ -110,7 +111,6 @@ use crate::{machinst::*, trace};
 use alloc::boxed::Box;
 use core::marker::PhantomData;
 use regalloc2::{MachineEnv, PReg, PRegSet};
-use rustc_hash::FxHashMap;
 use smallvec::smallvec;
 
 /// A small vector of instructions (with some reasonable size); appropriate for
@@ -574,7 +574,7 @@ pub trait ABIMachineSpec {
     ) -> u32;
 
     /// Get the ABI-dependent MachineEnv for managing register allocation.
-    fn get_machine_env(flags: &settings::Flags, call_conv: isa::CallConv) -> &MachineEnv;
+    fn get_machine_env(flags: &settings::Flags, call_conv: isa::CallConv) -> MachineEnv;
 
     /// Get all caller-save registers, that is, registers that we expect
     /// not to be saved across a call to a callee with the given ABI.
@@ -1539,7 +1539,7 @@ impl<M: ABIMachineSpec> Callee<M> {
     }
 
     /// Get the ABI-dependent MachineEnv for managing register allocation.
-    pub fn machine_env(&self) -> &MachineEnv {
+    pub fn machine_env(&self) -> MachineEnv {
         M::get_machine_env(&self.flags, self.call_conv)
     }
 

cranelift/codegen/src/machinst/blockorder.rs

@@ -64,8 +64,8 @@ use crate::dominator_tree::DominatorTree;
 use crate::entity::SecondaryMap;
 use crate::inst_predicates::visit_block_succs;
 use crate::ir::{Block, Function, Inst, Opcode};
+use crate::{FxHashMap, FxHashSet};
 use crate::{machinst::*, trace};
-use rustc_hash::{FxHashMap, FxHashSet};
 
 /// Mapping from CLIF BBs to VCode BBs.
 #[derive(Debug)]

cranelift/codegen/src/machinst/compile.rs

@@ -69,7 +69,7 @@ pub fn compile<B: LowerBackend + TargetIsa>(
             RegallocAlgorithm::SinglePass => Algorithm::Fastalloc,
         };
 
-        regalloc2::run(&vcode, vcode.abi.machine_env(), &options)
+        regalloc2::run(&vcode, &vcode.abi.machine_env(), &options)
             .map_err(|err| {
                 log::error!(
                     "Register allocation error for vcode\n{vcode:?}\nError: {err:?}\nCLIF for error:\n{f:?}",
@@ -82,7 +82,8 @@ pub fn compile<B: LowerBackend + TargetIsa>(
     // Run the regalloc checker, if requested.
     if b.flags().regalloc_checker() {
         let _tt = timing::regalloc_checker();
-        let mut checker = regalloc2::checker::Checker::new(&vcode, vcode.abi.machine_env());
+        let machine_env = vcode.abi.machine_env();
+        let mut checker = regalloc2::checker::Checker::new(&vcode, &machine_env);
         checker.prepare(&regalloc_result);
         checker
             .run()