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@christiaanb christiaanb commented Nov 21, 2025

A function to add synthesis attributes (e.g. ASYNC_REG) to register declarations in the HDL generated by the Clash compiler.

The implementation extends the information you can carry around in a Tick. This made it possible to add attributes to the assigned result of any declaration primitive, which includes register, delay and dflipflop. It means we didn't have to add any logic to these primitives nor hard-code a list of primitives for which this annotation mechanism works. It also avoid the fragility of the type synonym based approach.

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Cool! Could you open an issue saying termToData should (perhaps) use the evaluator?

Comment on lines 1889 to 1901
go decls (Attributes ty attrs0:ticks) = do
tcm <- Lens.view tcCache
case coreView tcm ty of
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Could you please add a comment why you're doing this whole block?

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I've added some comments, let me know whether you want me to elaborate it even further

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LGTM!

a function to add synthesis attributes (e.g. `ASYNC_REG`) to
register declarations in the HDL generated by the Clash compiler.
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