Skip to content

Commit 1e4fdef

Browse files
authored
Merge pull request #1035 from diffblue/sequence_repetition2
BMC: implement SVA `[*]` and `[+]` for state formulas
2 parents cd769ea + 47e00d7 commit 1e4fdef

File tree

5 files changed

+47
-18
lines changed

5 files changed

+47
-18
lines changed

CHANGELOG

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
# EBMC 5.6
22

3+
* SystemVerilog: [*] and [+] SVA operators
34
* SystemVerilog: typedefs from package scopes
45
* SystemVerilog: assignment patterns with keys for structs
56
* SystemVerilog: unbased unsigned literals '0, '1, 'x, 'z

regression/verilog/SVA/sequence_repetition2.desc

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,15 @@
11
CORE
22
sequence_repetition2.sv
33
--bound 10
4-
^\[main\.p0\] main\.x == 0\[\*\]: FAILURE: property not supported by BMC engine$
5-
^\[main\.p1\] main\.x == 1\[\*\]: FAILURE: property not supported by BMC engine$
6-
^\[main\.p2\] \(main\.x == 0\[\+\]\) #-# main\.x == 1: FAILURE: property not supported by BMC engine$
7-
^\[main\.p3\] main\.x == 0\[\+\]: FAILURE: property not supported by BMC engine$
8-
^\[main\.p4\] main\.half_x == 0\[\*\]: FAILURE: property not supported by BMC engine$
9-
^\[main\.p5\] main\.x == 1\[\+\]: FAILURE: property not supported by BMC engine$
10-
^\[main\.p6\] \(main\.x == 0\[\+\]\) #=# main\.x == 1: FAILURE: property not supported by BMC engine$
4+
^\[main\.p0\] main\.x == 0\[\*\]: PROVED up to bound 10$
5+
^\[main\.p1\] main\.x == 1\[\*\]: PROVED up to bound 10$
6+
^\[main\.p2\] \(main\.x == 0\[\+\]\) #=# main\.x == 1: PROVED up to bound 10$
7+
^\[main\.p3\] main\.x == 0\[\+\]: PROVED up to bound 10$
8+
^\[main\.p4\] main\.half_x == 0\[\*\]: PROVED up to bound 10$
9+
^\[main\.p5\] 0\[\*\]: PROVED up to bound 10$
10+
^\[main\.p6\] main\.x == 1\[\+\]: REFUTED$
11+
^\[main\.p7\] \(main\.x == 0\[\+\]\) #-# main\.x == 1: REFUTED$
12+
^\[main\.p8\] 0\[\+\]: REFUTED$
1113
^EXIT=10$
1214
^SIGNAL=0$
1315
--

regression/verilog/SVA/sequence_repetition2.sv

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,14 @@ module main(input clk);
1212
// should pass
1313
initial p0: assert property (x==0[*]);
1414
initial p1: assert property (x==1[*]);
15-
initial p2: assert property (x==0[+] #-# x==1);
15+
initial p2: assert property (x==0[+] #=# x==1);
1616
initial p3: assert property (x==0[+]);
1717
initial p4: assert property (half_x==0[*]);
18+
initial p5: assert property (0[*]); // empty match
1819

1920
// should fail
20-
initial p5: assert property (x==1[+]);
21-
initial p6: assert property (x==0[+] #=# x==1);
21+
initial p6: assert property (x==1[+]);
22+
initial p7: assert property (x==0[+] #-# x==1);
23+
initial p8: assert property (0[+]);
2224

2325
endmodule

src/trans-word-level/property.cpp

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -115,14 +115,6 @@ bool bmc_supports_SVA_property(const exprt &expr)
115115
if(has_subexpr(expr, ID_sva_sequence_within))
116116
return false;
117117

118-
// sva_sequence_repetition_plus is not supported yet
119-
if(has_subexpr(expr, ID_sva_sequence_repetition_plus))
120-
return false;
121-
122-
// sva_sequence_repetition_star is not supported yet
123-
if(has_subexpr(expr, ID_sva_sequence_repetition_star))
124-
return false;
125-
126118
// sva_sequence_non_consecutive_repetition is not supported yet
127119
if(has_subexpr(expr, ID_sva_sequence_non_consecutive_repetition))
128120
return false;

src/trans-word-level/sequence.cpp

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,10 @@ Author: Daniel Kroening, [email protected]
1111
#include <util/arith_tools.h>
1212
#include <util/ebmc_util.h>
1313

14+
#include <temporal-logic/temporal_logic.h>
1415
#include <verilog/sva_expr.h>
1516

17+
#include "instantiate_word_level.h"
1618
#include "obligations.h"
1719
#include "property.h"
1820

@@ -240,6 +242,36 @@ std::vector<std::pair<mp_integer, exprt>> instantiate_sequence(
240242
auto &repetition = to_sva_sequence_consecutive_repetition_expr(expr);
241243
return instantiate_sequence(repetition.lower(), t, no_timeframes);
242244
}
245+
else if(
246+
expr.id() == ID_sva_sequence_repetition_plus ||
247+
expr.id() == ID_sva_sequence_repetition_star)
248+
{
249+
// x[+] and x[*]
250+
auto &op = to_unary_expr(expr).op();
251+
252+
// Is x a sequence or a state predicate?
253+
if(is_SVA_sequence_operator(op))
254+
PRECONDITION(false); // no support
255+
256+
std::vector<std::pair<mp_integer, exprt>> result;
257+
258+
// we incrementally add conjuncts to the condition
259+
exprt::operandst conjuncts;
260+
261+
for(mp_integer u = t; u < no_timeframes; ++u)
262+
{
263+
// does x hold in state u?
264+
auto cond_u = instantiate(op, u, no_timeframes);
265+
conjuncts.push_back(cond_u);
266+
result.push_back({u, conjunction(conjuncts)});
267+
}
268+
269+
// In addition to the above, x[*] allows an empty match.
270+
if(expr.id() == ID_sva_sequence_repetition_star)
271+
result.push_back({t, true_exprt{}});
272+
273+
return result;
274+
}
243275
else
244276
{
245277
// not a sequence, evaluate as state predicate

0 commit comments

Comments
 (0)