[FYI][WIP] pfalcon's changes in smsc9220 branch #2
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Just as an update, I'm trying to put everything else aside and get back to this. And the current situation is the opposite to what happens with zephyrproject-rtos#9112 - there's I don't get any interrupts at all. With mps2, I get a storm of spurious Ethernet interrupts, with interrupt status remaining at 0, or even when interrupts are disabled on smsc9220 side. I'm definitely going to dig further, and expect that to be long bumpy dig ;-). P.S. Pushed branch rebased on master, and as this repo is far behind, the PR is a mess. |
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Convert fxos8700 sensor driver to use new defines so we can remove the dts_fixup.h code for it. Signed-off-by: Kumar Gala <[email protected]>
1. Update shell documentation according to proposals in PR zephyrproject-rtos#12437 (Extend shell meta keys). 2. Fix lines exceeding 80 characters limit. Signed-off-by: Jakub Rzeszutko <[email protected]>
These were being truncated to 32-bits, and only 8 hex digits were supported. An extraneous printk() at the beginning of the test which was not being tested in any way has been removed. Signed-off-by: Andrew Boie <[email protected]>
Due to a copy-paste mistake, this driver used an incorrect module name (adc_mcux_adc16) in log messages. Signed-off-by: Andrzej Głąbek <[email protected]>
Currently only nRF drivers need assignments of analog inputs to ADC channels (ADC_CONFIGURABLE_INPUTS Kconfig option is activated only for these drivers). Hence, there is no need to define ADC_xxx_CHANNEL_INPUT labels for any other ADC driver as they will be ignored anyway. Signed-off-by: Andrzej Głąbek <[email protected]>
Apart from normal customizations of vendor specific parameters in ADC configuration used in the test, a few more changes in test cases were also introduced in commit 1bfa34f. This resulted in some parts of ADC API (like zero interval between consecutive samplings) not being tested at all. This commit restores the original behavior of the test cases (with added comments that zero intervals are intentional). Signed-off-by: Andrzej Głąbek <[email protected]>
This commit adds a test case checking if ADC drivers can work properly after discarding an invalid sampling request. Signed-off-by: Andrzej Głąbek <[email protected]>
Commit aad21ec introduced an incorrect pattern of handling ADC sampling requests with invalid parameters in both nRF ADC drivers. After discarding such request, the drivers do not release properly the access lock and therefore become unusable. Unfortunately, this pattern were later on copied in all other ADC drivers in the source tree. This commit adds the proper lock releasing in all the affected drivers. Signed-off-by: Andrzej Głąbek <[email protected]>
While trying to catch crashes after test completes, do not keep extending the timeout which might lead to and endless loop and not getting out based on set timeout. Signed-off-by: Anas Nashif <[email protected]>
The Intel S1000 board has a SPI flash that isn't directly MMIO addressable. For this case we shouldn't generate CONFIG_FLASH_SIZE or CONFIG_FLASH_BASE_ADDRESS. We use the heuristic of assuming if the flash node #size-cells is 0, its a SPI flash. Than if the parent node (SPI controller) has only a single reg element we assume its a non-MMIO addressable SPI flash. If there is more than one reg element we assume the last reg element is the MMIO address region for access to the flash. Fixes zephyrproject-rtos#12530 Signed-off-by: Kumar Gala <[email protected]>
The SimpleLink wifi driver enables the Fast Connect method of WiFi provisioning, which allows the network coprocessor to reconnect to a previously connected Access Point (AP) on startup. Previously, if Fast Connect failed to connect, any network socket applications would inevitably fail, as there would have been no wifi connection. This patch adds a configurable timeout for the Fast Connect feature, after which timeout, an error is logged informing the user to manually reconnect to an AP. Reconnection is typically accomplished by separately running the wifi sample shell program. Fixes: zephyrproject-rtos#11889 Signed-off-by: Gil Pitney <[email protected]>
The board has SMSC LAN9220 (actually as an "IP core" in an FPGA-emulated SoC). The patch includes DTS bindings for this device. Signed-off-by: Paul Sokolovsky <[email protected]>
As emulated by QEMU. SMSC9118 is compatible with SMSC9220 as used in ARM MPS2 board, as well as SMSC9115/6/7/etc. devices. Portions of the code are based on mbedOS code from its targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/drivers/smsc9220_eth.c eth_smsc9220_priv.h originally comes from Arm mbedOS file: targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/drivers/smsc9220_eth.h augmented with struct & defines from: targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/CM3DS.h and renamed as eth_smsc911x_priv.h to follow Zephyr conventions. Then, following changes applied: Changes to build under Zephyr, changes to use symbolic constants and field access helpers, typo fixes, etc. Signed-off-by: Paul Sokolovsky <[email protected]>
Board can be emulated in QEMU, so select QEMU_TARGET as required for various bits of "make run" magic to work. Signed-off-by: Paul Sokolovsky <[email protected]>
As can be used for example with BOARD=mps2_an385. Signed-off-by: Paul Sokolovsky <[email protected]>
Add overlays for commonly used socket samples: big_http_download and dumb_http_server. Can be used with: make BOARD=mps2_an385 CONF_FILE="prj.conf overlay-smsc911x.conf" Signed-off-by: Paul Sokolovsky <[email protected]>
mps2_an385 is enabled for networking -> default networking is SLIP -> SLIP selects UART_PIPE -> UART_PIPE requires UART_PIPE_ON_DEV defined -> undefined leads to error on building some samples. Fix all of these issues. Signed-off-by: Paul Sokolovsky <[email protected]>
By adding relevant test config to sample.yaml. Signed-off-by: Paul Sokolovsky <[email protected]>
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galak
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Jun 26, 2019
Currently, the free block bitmap is roughly 4 times larger than it needs to, wasting memory. Let's assume maxsz = 128, minsz = 8 and n_max = 40. Z_MPOOL_LVLS(128, 8) returns 3. The block size for level #0 is 128, the block size for level #1 is 128/4 = 32, and the block size for level #2 is 32/4 = 8. Hence levels 0, 1, and 2 for a total of 3 levels. So far so good. Now let's look at Z_MPOOL_LBIT_WORDS(). We get: Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 0) = ((40 << 0) + 31) / 32 = 2 Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 1) = ((40 << 2) + 31) / 32 = 5 Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 2) = ((40 << 4) + 31) / 32 = 20 None of those are < 2 so Z_MPOOL_LBIT_WORDS() takes the results from Z_MPOOL_LBIT_WORDS_UNCLAMPED(). Finally, let's look at _MPOOL_BITS_SIZE(. It sums all possible levels with Z_MPOOL_LBIT_BYTES() which is: #define Z_MPOOL_LBIT_BYTES(maxsz, minsz, l, n_max) \ (Z_MPOOL_LVLS((maxsz), (minsz)) >= (l) ? \ 4 * Z_MPOOL_LBIT_WORDS((n_max), l) : 0) Or given what we already have: Z_MPOOL_LBIT_BYTES(128, 8, 0, 40) = (3 >= 0) ? 4 * 2 : 0 = 8 Z_MPOOL_LBIT_BYTES(128, 8, 1, 40) = (3 >= 1) ? 4 * 5 : 0 = 20 Z_MPOOL_LBIT_BYTES(128, 8, 2, 40) = (3 >= 2) ? 4 * 20 : 0 = 80 Z_MPOOL_LBIT_BYTES(128, 8, 3, 40) = (3 >= 3) ? 4 * ?? Wait... we're missing this one: Z_MPOOL_LBIT_WORDS_UNCLAMPED(40, 3) = ((40 << 6) + 31) / 32 = 80 then: Z_MPOOL_LBIT_BYTES(128, 8, 3, 40) = (3 >= 3) ? 4 * 80 : 0 = 320 Further levels yeld (3 >= 4), (3 >= 5), etc. so they're all false and produce 0. So this means that we're statically allocating 428 bytes to the bitmap when clearly only the first 3 Z_MPOOL_LBIT_BYTES() results for the corresponding 3 levels that we have should be summed e.g. only 108 bytes. Here the code logic gets confused between level numbers and the number levels, hence the extra allocation which happens to be exponential. Signed-off-by: Nicolas Pitre <[email protected]>
galak
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Oct 17, 2019
Fix Kconfig conditional include of Minimum Channels Used and Channel Selection Algorithm #2. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Jun 22, 2020
This makes the gatt metrics also available for gatt write-without-rsp-cb so it now prints the rate of each write: uart:~$ gatt write-without-response-cb 1e ff 10 10 Write #1: 16 bytes (0 bps) Write #2: 32 bytes (3445948416 bps) Write #3: 48 bytes (2596929536 bps) Write #4: 64 bytes (6400 bps) Write #5: 80 bytes (8533 bps) Write #6: 96 bytes (10666 bps) Write #7: 112 bytes (8533 bps) Write zephyrproject-rtos#8: 128 bytes (9955 bps) Write zephyrproject-rtos#9: 144 bytes (11377 bps) Write zephyrproject-rtos#10: 160 bytes (7680 bps) Write zephyrproject-rtos#11: 176 bytes (8533 bps) Write zephyrproject-rtos#12: 192 bytes (9386 bps) Write Complete (err 0) Write zephyrproject-rtos#13: 208 bytes (8533 bps) Write zephyrproject-rtos#14: 224 bytes (9244 bps) Write zephyrproject-rtos#15: 240 bytes (9955 bps) Write zephyrproject-rtos#16: 256 bytes (8000 bps) Signed-off-by: Luiz Augusto von Dentz <[email protected]>
galak
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Nov 17, 2020
The _ldiv5() is an optimized divide-by-5 function that is smaller and
faster than the generic libgcc implementation.
Yet it can be made even smaller and faster with this replacement
implementation based on a reciprocal multiplication plus some tricks.
For example, here's the assembly from the original code on ARM:
_ldiv5:
ldr r3, [r0]
movw ip, zephyrproject-rtos#52429
ldr r1, [r0, #4]
movt ip, 52428
adds r3, r3, #2
push {r4, r5, r6, r7, lr}
mov lr, #0
adc r1, r1, lr
adds r2, lr, lr
umull r7, r6, ip, r1
lsr r6, r6, #2
adc r7, r6, r6
adds r2, r2, r2
adc r7, r7, r7
adds r2, r2, lr
adc r7, r7, r6
subs r3, r3, r2
sbc r7, r1, r7
lsr r2, r3, #3
orr r2, r2, r7, lsl zephyrproject-rtos#29
umull r2, r1, ip, r2
lsr r2, r1, #2
lsr r7, r1, zephyrproject-rtos#31
lsl r1, r2, #3
adds r4, lr, r1
adc r5, r6, r7
adds r2, r1, r1
adds r2, r2, r2
adds r2, r2, r1
subs r2, r3, r2
umull r3, r2, ip, r2
lsr r2, r2, #2
adds r4, r4, r2
adc r5, r5, #0
strd r4, [r0]
pop {r4, r5, r6, r7, pc}
And here's the resulting assembly with this commit applied:
_ldiv5:
push {r4, r5, r6, r7}
movw r4, zephyrproject-rtos#13107
ldr r6, [r0]
movt r4, 13107
ldr r1, [r0, #4]
mov r3, #0
umull r6, r7, r6, r4
add r2, r4, r4, lsl #1
umull r4, r5, r1, r4
adds r1, r6, r2
adc r2, r7, r2
adds ip, r6, r4
adc r1, r7, r5
adds r2, ip, r2
adc r2, r1, r3
adds r2, r4, r2
adc r3, r5, r3
strd r2, [r0]
pop {r4, r5, r6, r7}
bx lr
So we're down to 20 instructions from 36 initially, with only 2 umull
instructions instead of 3, and slightly smaller stack footprint.
Signed-off-by: Nicolas Pitre <[email protected]>
galak
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Mar 18, 2021
Added function to calculate channel identifier value required for Channel Selection Algorithm #2. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Mar 25, 2021
The fatal log now contains - Trap type in human readable representation - Integer registers visible to the program when trap was taken - Special register values such as PC and PSR - Backtrace with PC and SP If CONFIG_EXTRA_EXCEPTION_INFO is enabled, then all the above is logged. If not, only the special registers are logged. The format is inspired by the GRMON debug monitor and TSIM simulator. A quick guide on how to use the values is in fatal.c. It now looks like this: E: tt = 0x02, illegal_instruction E: E: INS LOCALS OUTS GLOBALS E: 0: 00000000 f3900fc0 40007c50 00000000 E: 1: 00000000 40004bf0 40008d30 40008c00 E: 2: 00000000 40004bf4 40008000 00000003 E: 3: 40009158 00000000 40009000 00000002 E: 4: 40008fa8 40003c00 40008fa8 00000008 E: 5: 40009000 f3400fc0 00000000 00000080 E: 6: 4000a1f8 40000050 4000a190 00000000 E: 7: 40002308 00000000 40001fb8 000000c1 E: E: psr: f30000c7 wim: 00000008 tbr: 40000020 y: 00000000 E: pc: 4000a1f4 npc: 4000a1f8 E: E: pc sp E: #0 4000a1f4 4000a190 E: #1 40002308 4000a1f8 E: #2 40003b24 4000a258 Signed-off-by: Martin Åberg <[email protected]>
galak
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May 5, 2021
Reorder Channel Selection Algorithm #2 and Minimum Number of Used Channels Procedure bits. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Jul 19, 2021
Implement the functions required to calculate the SubEvent 1 and SubEvent n mapped channel indices. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Jul 19, 2021
Added Bluetooth Specification references to the implementation of Channel Selection algorithm #2 in the Controller. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Oct 7, 2021
Remove explicit disable of Channel Selection Algorithm #2 in the mesh tests that use Extended Advertising. Fixes zephyrproject-rtos#39188. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
galak
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Mar 17, 2023
Add additional custom LE Channel Selection #2 tests to cover event and subevent mapping. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
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@galak, Just for more visibility posting the (hacky) changes I have so far as a viewable diff.