Skip to content

SPIRV vector.mask lowering: use 64-bit type.#1093

Merged
Garra1980 merged 1 commit intointel:mainfrom
antonio-cortes-perez:dev/aperez/mask_64_upstream
Jul 16, 2025
Merged

SPIRV vector.mask lowering: use 64-bit type.#1093
Garra1980 merged 1 commit intointel:mainfrom
antonio-cortes-perez:dev/aperez/mask_64_upstream

Conversation

@antonio-cortes-perez
Copy link
Contributor

So far, most of the kernels use 16 or 32 vector sizes. But there is a kernel that returns an i8 tensor and the vector size = 64. So, there was an overflow when computing the mask (1 << valid_elements). This PR updates the data type from 32-bit to 64-bit when computing the mask. It also adds an assert to catch more easily this type of issue.

So far, most of the kernels use 16 or 32 vector sizes. But there is a
kernel that returns an i8 tensor and the vector size = 64. So, there
was an overflow when computing the mask (1 << valid_elements). This PR
updates the data type from 32-bit to 64-bit when computing the mask.
It also adds an assert to catch more easily this type of issue.
@antonio-cortes-perez antonio-cortes-perez force-pushed the dev/aperez/mask_64_upstream branch from 835970e to dbafb63 Compare July 16, 2025 21:13
@antonio-cortes-perez antonio-cortes-perez changed the title [PERFC-316] SPIRV vector.mask lowering: use 64-bit type. SPIRV vector.mask lowering: use 64-bit type. Jul 16, 2025
@Garra1980 Garra1980 merged commit 36cd847 into intel:main Jul 16, 2025
2 checks passed
@antonio-cortes-perez antonio-cortes-perez deleted the dev/aperez/mask_64_upstream branch July 16, 2025 23:04
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants