Fix #47 - Detect RISC-V and RISC-V SIMD instructions set

jfalcou · Aug 30, 2024 · 4e4a3ed · 4e4a3ed
1 parent 29cc7ab
commit 4e4a3ed
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Showing 11 changed files with 165 additions and 1,236 deletions.
diff --git a/.github/workflows/unit.yml b/.github/workflows/unit.yml
@@ -39,7 +39,7 @@ jobs:
       - name: Compiling Unit Tests
         run:  cd build && make spy-test -j 2
       - name: Running Unit Tests
-        run: cd build && ctest --output-on-failure -j 2
+        run: cd build && ctest --verbose --output-on-failure -j 2
 
   ##################################################################################################
   ## Windows Targets
@@ -67,7 +67,7 @@ jobs:
       - name: Running Tests
         run: |
           cd build
-          ctest -C ${{ matrix.cfg.mode }} --output-on-failure
+          ctest --verbose -C ${{ matrix.cfg.mode }} --output-on-failure
 
   clang-cl:
     runs-on: [windows-2022]
@@ -92,7 +92,7 @@ jobs:
       - name: Running Tests
         run: |
           cd build
-          ctest -C ${{ matrix.cfg.mode }} --output-on-failure
+          ctest --verbose -C ${{ matrix.cfg.mode }} --output-on-failure
 
   ##################################################################################################
   ## WASM targets
@@ -118,7 +118,33 @@ jobs:
       - name: Compiling Unit Tests
         run:  cd build && ninja spy-test -j 2
       - name: Running Unit Tests
-        run: cd build && ctest --output-on-failure -j 2
+        run: cd build && ctest --verbose --output-on-failure -j 2
+
+  ##################################################################################################
+  ## RISC-V targets
+  ##################################################################################################
+  riscv:
+    runs-on: ubuntu-latest
+    container:
+      image: ghcr.io/jfalcou/compilers:v8
+    strategy:
+      fail-fast: false
+      matrix:
+        cfg:
+        - { comp: clang , arch: rvv128, mode: Debug    }
+        - { comp: clang , arch: rvv128, mode: Release  }
+    steps:
+      - name: Fetch current branch
+        uses: actions/[email protected]
+      - name: Running CMake for ${{ matrix.cfg.comp }} in ${{ matrix.cfg.mode }} mode
+        run: |
+          mkdir build && cd build
+          cmake .. -G Ninja -DCMAKE_BUILD_TYPE="${{ matrix.cfg.mode }}"  \
+                -DCMAKE_TOOLCHAIN_FILE=../test/toolchain/${{ matrix.cfg.comp }}.${{ matrix.cfg.arch }}.cmake
+      - name: Compiling Unit Tests
+        run:  cd build && ninja spy-test -j 2
+      - name: Running Unit Tests
+        run: cd build && ctest --verbose --output-on-failure -j 2
 
   ##################################################################################################
   ## NVCC targets
@@ -175,7 +201,7 @@ jobs:
       - name: Compiling Unit Tests
         run:  cd build && ninja spy-test -j 2
       - name: Running Unit Tests
-        run: cd build && ctest --output-on-failure -j 2
+        run: cd build && ctest --verbose --output-on-failure -j 2
 
   ##################################################################################################
   ## Clang targets
@@ -201,7 +227,7 @@ jobs:
       - name: Compiling Unit Tests
         run:  cd build && ninja spy-test -j 2
       - name: Running Unit Tests
-        run: cd build && ctest --output-on-failure -j 2
+        run: cd build && ctest --verbose --output-on-failure -j 2
 
   ##################################################################################################
   ## gcc targets
@@ -235,4 +261,4 @@ jobs:
       - name: Compile Unit Tests
         run:  cd build && ninja spy-test -j 2
       - name: Running Unit Tests
-        run:  cd build && ctest --output-on-failure -j 2
+        run:  cd build && ctest --verbose --output-on-failure -j 2
diff --git a/include/spy/arch.hpp b/include/spy/arch.hpp
@@ -14,6 +14,7 @@ namespace spy::detail
                     , x86_ = 10, amd64_ = 11
                     , ppc_ = 20, arm_ = 30
                     , wasm_ = 40
+                    , riscv_ = 50
                     };
 
   template<archs Arch> struct arch_info
@@ -37,6 +38,7 @@ namespace spy::detail
     if(Arch == archs::ppc_  ) return os << "PowerPC";
     if(Arch == archs::arm_  ) return os << "ARM";
     if(Arch == archs::wasm_ ) return os << "WebAssembly";
+    if(Arch == archs::riscv_) return os << "RISC-V";
 
     return os << "Undefined Architecture";
   }
@@ -64,6 +66,9 @@ namespace spy
 #elif defined(__wasm__)
   using arch_type = detail::arch_info<detail::archs::wasm_>;
   #define SPY_ARCH_IS_WASM
+#elif defined(__riscv)
+  using arch_type = detail::arch_info<detail::archs::riscv_>;
+  #define SPY_ARCH_IS_RISCV
 #else
   #define SPY_ARCH_IS_UNKNOWN
   using arch_type = detail::arch_info<detail::archs::undefined_>;
@@ -86,6 +91,7 @@ namespace spy
   //! `spy::amd64`    | Intel X86-64 and similar architectures.
   //! `spy::arm`      | ARM.
   //! `spy::ppc`      | PowerPC.
+  //! `spy::riscv`    | RISC-V.
   //! `spy::wasm`     | WASM pseudo-architecture.
   //! `spy::x86`      | Intel X86.
   //!
@@ -114,4 +120,5 @@ namespace spy
   constexpr inline auto ppc_    = detail::arch_info<detail::archs::ppc_>{};
   constexpr inline auto arm_    = detail::arch_info<detail::archs::arm_>{};
   constexpr inline auto wasm_   = detail::arch_info<detail::archs::wasm_>{};
+  constexpr inline auto riscv_  = detail::arch_info<detail::archs::riscv_>{};
 }
diff --git a/include/spy/simd.hpp b/include/spy/simd.hpp
@@ -12,10 +12,17 @@
 #include <spy/simd/arm.hpp>
 #include <spy/simd/ppc.hpp>
 #include <spy/simd/wasm.hpp>
+#include <spy/simd/riscv.hpp>
 
 namespace spy::detail
 {
-  enum class simd_isa { undefined_ = -1, x86_ = 1000, ppc_ = 2000, arm_ = 3000, arm_sve_ = 3500, wasm_ = 4000 };
+  enum class simd_isa { undefined_  = -1
+                      , x86_        = 1000
+                      , ppc_        = 2000
+                      , arm_        = 3000, arm_sve_ = 3500
+                      , wasm_       = 4000
+                      , riscv_      = 5000
+                      };
 
   enum class simd_version { undefined_  = -1
                           , sse1_       = 1110, sse2_  = 1120, sse3_ = 1130, ssse3_ = 1131
@@ -30,6 +37,7 @@ namespace spy::detail
                           , neon_       = 4001, asimd_    = 4002
                           , sve_        = 5000, sve2_     = 5500
                           , simd128_    = 6000
+                          , rvv_        = 7000
                           };
 
   template< simd_isa InsSetArch  = simd_isa::undefined_
@@ -49,14 +57,23 @@ namespace spy::detail
                   )                                                                       return 128;
       else  if constexpr(Version == simd_version::avx_ || Version == simd_version::avx2_) return 256;
       else  if constexpr(Version == simd_version::avx512_     )                           return 512;
-      else  if constexpr(Version >= simd_version::sve_)
+else if constexpr( Version == simd_version::rvv_ )
+      {
+#if defined(__riscv_v_fixed_vlen)
+        return __riscv_v_fixed_vlen;
+#else
+        return -1;
+#endif
+      }
+      else  if constexpr(Version == simd_version::sve_ || Version == simd_version::sve2_)
       {
 #if defined(__ARM_FEATURE_SVE_BITS)
         return __ARM_FEATURE_SVE_BITS;
 #else
         return -1;
 #endif
       }
+
       else return -1;
     }();
 
@@ -86,10 +103,19 @@ namespace spy::detail
       }
       else  if constexpr ( Version == simd_version::neon_     ) os  << "ARM NEON";
       else  if constexpr ( Version == simd_version::asimd_    ) os  << "ARM ASIMD";
-      else  if constexpr ( Version >= simd_version::sve_      )
+      else  if constexpr ( Version == simd_version::sve_ || Version == simd_version::sve2_ )
       {
-        if constexpr ( Version == simd_version::sve2_ ) os  << "ARM SVE2 (";
-        else                                            os  << "ARM SVE  (";
+        os  << "ARM SVE" << (Version == simd_version::sve2_ ? "2" : "") << "(";
+
+        constexpr auto fc = has_fixed_cardinal();
+        if constexpr(fc)  os << simd_info::width;
+        else              os << "dyn.";
+
+        os << " bits)";
+      }
+      else  if constexpr ( Version == simd_version::rvv_ )
+      {
+        os  << "RISC-V RVV(";
 
         constexpr auto fc = has_fixed_cardinal();
         if constexpr(fc)  os << simd_info::width;
@@ -170,6 +196,7 @@ namespace spy
   //! | **ARM NEON**      | `spy::neon_`, `spy::asimd_`                                                             |
   //! | **ARM SVE**       | `spy::sve_`,`spy::sve128_`, `spy::sve256_`, `spy::sve512_`, `spy::sve1024_`             |
   //! | **WASM**          | `spy::simd128_`                                                                         |
+  //! | **RISC-V**        | `spy::rvv_``                                                                            |
   //!
   //! Complete set of comparison operators is provided for those sets. Order of instructions sets
   //! are built so that if an instructions set supersedes another, it is considered greater than. For
@@ -192,6 +219,7 @@ namespace spy
   //! | **Power PC**  | `spy::ppc_simd_`    |
   //! | **ARM**       | `spy::arm_simd_`    |
   //! | **WASM**      | `spy::wasm_simd_`   |
+  //! | **RISC-V**    | `spy::riscv_simd_`  |
   //!
   //! @subgroupheader{Example - SIMD Architectures}
   //! @godbolt{samples/simd-arch.cpp}
@@ -271,4 +299,9 @@ namespace spy
   constexpr inline auto asimd_      = arm_simd_info<detail::simd_version::asimd_>{};
   constexpr inline auto sve_        = sve_simd_info<detail::simd_version::sve_>{};
   constexpr inline auto sve2_       = sve_simd_info<detail::simd_version::sve2_>{};
+
+  template<detail::simd_version V= detail::simd_version::undefined_>
+  using riscv_simd_info             =  detail::simd_info<detail::simd_isa::riscv_, V>;
+  constexpr inline auto riscv_simd_ = riscv_simd_info<> {};
+  constexpr inline auto rvv_        = riscv_simd_info<detail::simd_version::rvv_> {};
 }
diff --git a/include/spy/simd/riscv.hpp b/include/spy/simd/riscv.hpp
@@ -0,0 +1,24 @@
+//==================================================================================================
+/*
+  SPY - C++ Informations Broker
+  Copyright : SPY Project Contributors
+  SPDX-License-Identifier: BSL-1.0
+*/
+//==================================================================================================
+#pragma once
+
+#if defined(__riscv_vector)
+// Flexible RISC-V Vector has no __riscv_v_fixed_vlen defined
+# if !defined(__riscv_v_fixed_vlen)
+#   define SPY_SIMD_IS_RISCV_FLEXIBLE_RVV_CARDINAL
+// Fixed-size RISC-V Vector has __riscv_v_fixed_vlen
+#else
+#  define SPY_SIMD_IS_RISCV_FIXED_RVV_CARDINAL
+#endif
+#endif
+
+#if !defined(SPY_SIMD_DETECTED) && defined(__riscv_vector)
+# define SPY_SIMD_IS_RISCV_RVV
+# define SPY_SIMD_VENDOR    ::spy::detail::simd_isa::riscv_
+# define SPY_SIMD_DETECTED  ::spy::detail::simd_version::rvv_
+#endif