GitHub - lefosg/MIPS-16-bit: 16 bit MIPS processor implementation in VHDL

Implementation of MIPS in VHDL (16-bit ISA)

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
CPU.vhd		CPU.vhd
README.md		README.md
alu.vhd		alu.vhd
buffers.vhd		buffers.vhd
datapath.png		datapath.png
full circuit.vhd		full circuit.vhd
gates.vhd		gates.vhd
project2_chips.vhd		project2_chips.vhd
project3_chips.vhd		project3_chips.vhd
project3_chipsvhd.vhd		project3_chipsvhd.vhd
reg.vhd		reg.vhd

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