firtool-1.106.0

What's Changed

• [HW] Resolve ambiguous array_slice documentation by @maerhart in #8202
• [ESI][BSP] Bunch of small fixes and changes by @teqdruid in #8206
• [FIRRTL][LowerToHW] Lower contract ops by @fabianschuiki in #8159
• [circt-test] Add support for contracts by @fabianschuiki in #8166
• [MooreToCore]Fix a crash caused by block args as observed values for llhd.wait. by @hailongSun2000 in #8210
• [ImportVerilog] Fix assertion with constant folding by @likeamahoney in #8213
• [firtool] Add an option to emit HW MLIR into file by @uenoku in #8169
• [Verif] Mark SymbolicValueOp result as MemAlloc by @fabianschuiki in #8208
• [NFCI] Align cmake slightly more to mlir example by @darthscsi in #8217
• [RTG] Move immediates to RTG from RTGTest by @darthscsi in #8216
• [Moore] Mark wait_event with side-effect even if it is empty by @maerhart in #8220
• [LLHD] Add canonicalizer for ProcessOp by @maerhart in #8221
• Bump LLVM to 289b17635958d986b74683c932df6b1d12f37b70. by @mikeurbach in #8225
• [RTG] Add the PyRTG frontend by @maerhart in #8187
• [Verif] Add simulation op by @fabianschuiki in #8224
• [LLHD] Don't implement BranchOpInterface for WaitOp by @maerhart in #8241

New Contributors

• @likeamahoney made their first contribution in #8213

Full Changelog: firtool-1.105.0...firtool-1.106.0