Firtool Release 1.30.0

What's Changed

• [Pipeline] Plumb values through the pipeline + Support multi-cycle Ops by @matth2k in #4414
• [PyCDE] Class based struct definitions by @teqdruid in #4607
• [PyCDE][NFC] Cleanups and renames by @teqdruid in #4610
• [FIRRTL][GC] Always generate the scope yaml file by @youngar in #4612
• [HW][MSFT] Fix creating modules with InOut typed ports by @youngar in #4583
• Bump LLVM to 95e49f5a74c9e79778a62cc58b15875613cf9e59. by @mikeurbach in #4609
• [PyCDE] Improve type string representations by @teqdruid in #4616
• [PyCDE][NFC] Create signals from Python objects through Types by @teqdruid in #4611
• [LowerToHW] Lower aggregate constant by @uenoku in #4608
• Add port location information to verilog output by @youngar in #4540
• Migrate to the new folding api by @rwy7 in #4619
• [LLVM] Bump for CVE-2022-24439 by @teqdruid in #4621
• [CHIRRTL][NFC] Indicate using new fold API to squelch warnings. by @dtzSiFive in #4627
• [GC] Update numXMRs statistic. by @dtzSiFive in #4628
• [HW][NFC] InnerRef: Remove unused method definition by @dtzSiFive in #4629
• [ExportVerilog][PrettifyVerilog] Fix exprInEventControl by @uenoku in #4625
• [FIRRTL][NFC] Remove unused port boring/LCA methods. by @dtzSiFive in #4630
• [firtool] Use CIRCT's StripDebInfo pass instead of upstream by @youngar in #4632
• [FIRRTL] Remove extra whitespace around optional attr dicts by @rwy7 in #4324
• [ESI] Baseline XRT support by @teqdruid in #4537
• [FIRRTL] Support Chisel loadMemoryFromFile and loadMemoryFromFileInline by @seldridge in #4622
• [LowerAnnotations] Resolve legacy wiring annotations as WiringProblems by @sam-shahrestani in #4496
• [HWLegalizeModules] Legalize aggregate constant by @uenoku in #4626
• [ESI] Introduce ESI pure module op by @teqdruid in #4633
• [PyCDE] ESI pure module entry by @teqdruid in #4635
• [ESI][Cosim Runner] Add support for running binaries by @teqdruid in #4639
• [SV][ETC] Name port after instance result name, as well. by @dtzSiFive in #4640
• [firtool][NFC] Test relative path searching for includes. by @dtzSiFive in #4641
• [FIRRTL][AddSeqMemPorts] Fix use of DenseMap entry after invalidated. by @dtzSiFive in #4643
• [FIRRTL] Simple points-to like analysis by @darthscsi in #4637

New Contributors

• @sam-shahrestani made their first contribution in #4496

Full Changelog: firtool-1.29.0...firtool-1.30.0