SiFive Internal Release 1.20.0
Pre-release
Pre-release
Overview
- Added folders for constant clock and constant reset registers, enabled by recent FIRRTL spec clarifications of undefined behavior
- Optimizations around how array ops are emitted
- Fixes for the new module inlining and instance extraction in ExtractTestCode
- Fixes for Windows compilation
- Optimization in CheckCombCycles to save >35% runtime for that pass in some designs
- Added the TraceNames pass to implement Chisel's Trace API
What's Changed
- [Seq] Add const-clock and const-reset folders for FirRegOp by @fabianschuiki in #4090
- [FIRRTL][ExpandWhens] Add iterator to
HashTableStack
by @youngar in #4096 - [LowerToHW] Lower source subindex into array_get instead of read_inout and array_index by @uenoku in #4067
- [SV] Fix SVExtractTestCode to handle inlining cycles. by @mikeurbach in #4092
- [SV] Fix SVExtractTestCode to extract all results of instances. by @mikeurbach in #4101
- [SV] Fix SVExtractTestCode to not duplicate when inlining. by @mikeurbach in #4106
- [HW] Canonicalized array create to slices by @nandor in #4114
- [comb] Build Reduction Ops whenever possible by @Schottkyc137 in #3394
- [FIRRTL][CheckCombCycles] Use special class for End Iterator by @prithayan in #4086
- [FIRRTL] Add TraceNames Pass to Implement Chisel's Trace API by @seldridge in #4065
Full Changelog: sifive/1/19/0...sifive/1/20/0