Added nonbyte test. Removed interface to isValidAtomicTy.

Author: jofrn

llvm/include/llvm/IR/Instructions.h

@@ -250,11 +250,6 @@ class LoadInst : public UnaryInstruction {
            !isVolatile();
   }
 
-  /// Returns false if this type would be invalid in the
-  /// creation of a load atomic instruction.
-  static bool isValidAtomicTy(Type *Ty, const DataLayout *DL = nullptr,
-                              AtomicOrdering AO = AtomicOrdering::NotAtomic);
-
   Value *getPointerOperand() { return getOperand(0); }
   const Value *getPointerOperand() const { return getOperand(0); }
   static unsigned getPointerOperandIndex() { return 0U; }

llvm/lib/IR/Instructions.cpp

@@ -1247,20 +1247,6 @@ void LoadInst::AssertOK() {
          "Ptr must have pointer type.");
 }
 
-bool LoadInst::isValidAtomicTy(Type *Ty, const DataLayout *DL,
-                               AtomicOrdering AO) {
-  // TODO: Share methods with IR/Verifier.
-  if (!Ty->isIntOrPtrTy() && !Ty->isFloatingPointTy())
-    return false;
-  if (AO == AtomicOrdering::Release || AO == AtomicOrdering::AcquireRelease)
-    return false;
-  if (DL) {
-    unsigned Size = DL->getTypeSizeInBits(Ty);
-    return Size >= 8 && !(Size & (Size - 1));
-  }
-  return true;
-}
-
 static Align computeLoadStoreDefaultAlign(Type *Ty, InsertPosition Pos) {
   assert(Pos.isValid() &&
          "Insertion position cannot be null when alignment not provided!");

llvm/lib/Transforms/Scalar/SROA.cpp

@@ -2854,9 +2854,9 @@ class AllocaSliceRewriter : public InstVisitor<AllocaSliceRewriter, bool> {
   bool visitLoadInst(LoadInst &LI) {
     LLVM_DEBUG(dbgs() << "    original: " << LI << "\n");
 
-    // Load atomic vector would be generated, which is illegal.
+    // A load atomic vector would be generated, which is illegal.
     // TODO: Generate a generic bitcast in machine codegen instead.
-    if (LI.isAtomic() && !LoadInst::isValidAtomicTy(NewAI.getAllocatedType()))
+    if (LI.isAtomic() && NewAI.getAllocatedType()->isVectorTy())
       return false;
 
     Value *OldOp = LI.getOperand(0);
@@ -2881,7 +2881,6 @@ class AllocaSliceRewriter : public InstVisitor<AllocaSliceRewriter, bool> {
                (canConvertValue(DL, NewAllocaTy, TargetTy) ||
                 (IsLoadPastEnd && NewAllocaTy->isIntegerTy() &&
                  TargetTy->isIntegerTy() && !LI.isVolatile()))) {
-
       Value *NewPtr =
           getPtrToNewAI(LI.getPointerAddressSpace(), LI.isVolatile());
       LoadInst *NewLI = IRB.CreateAlignedLoad(NewAI.getAllocatedType(), NewPtr,

llvm/test/Transforms/SROA/atomic-vector.ll

@@ -68,3 +68,23 @@ define i32 @atomic_2vector_int() {
   %ret = load atomic volatile i32, ptr %indirect acquire, align 4
   ret i32 %ret
 }
+
+define i32 @atomic_2vector_nonbyte_illegal_int() {
+; CHECK-LABEL: define i32 @atomic_2vector_nonbyte_illegal_int() {
+; CHECK-NEXT:    [[SRC_SROA_1:%.*]] = alloca i17, align 4
+; CHECK-NEXT:    [[VAL_SROA_0:%.*]] = alloca i32, align 8
+; CHECK-NEXT:    [[VAL_SROA_2:%.*]] = alloca i17, align 4
+; CHECK-NEXT:    store i32 undef, ptr [[VAL_SROA_0]], align 8
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAL_SROA_2]], ptr align 4 [[SRC_SROA_1]], i64 4, i1 false)
+; CHECK-NEXT:    [[VAL_SROA_0_0_VAL_SROA_0_0_RET:%.*]] = load atomic volatile i32, ptr [[VAL_SROA_0]] acquire, align 4
+; CHECK-NEXT:    ret i32 [[VAL_SROA_0_0_VAL_SROA_0_0_RET]]
+;
+  %src = alloca <2 x i17>
+  %val = alloca <2 x i17>
+  %direct = alloca ptr
+  call void @llvm.memcpy.p0.p0.i64(ptr %val, ptr %src, i64 8, i1 false)
+  store ptr %val, ptr %direct
+  %indirect = load ptr, ptr %direct
+  %ret = load atomic volatile i32, ptr %indirect acquire, align 4
+  ret i32 %ret
+}