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[SDAG] Fix CSE for ADDRSPACECAST nodes #122912

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Jan 20, 2025
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6 changes: 6 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -954,6 +954,12 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
ID.AddInteger(M);
break;
}
case ISD::ADDRSPACECAST: {
const AddrSpaceCastSDNode *ASC = cast<AddrSpaceCastSDNode>(N);
ID.AddInteger(ASC->getSrcAddressSpace());
ID.AddInteger(ASC->getDestAddressSpace());
break;
}
case ISD::TargetBlockAddress:
case ISD::BlockAddress: {
const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
Expand Down
23 changes: 23 additions & 0 deletions llvm/test/CodeGen/NVPTX/addrspacecast-cse.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
; RUN: llc < %s -O0 -debug-only=isel -o /dev/null 2>&1 | FileCheck %s

; REQUIRES: asserts

target triple = "nvptx64-nvidia-cuda"

;; Selection DAG CSE is hard to test since we run CSE/GVN on the IR before and
;; after selection DAG ISel so most cases will be handled by one of these.
Comment on lines +7 to +8
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You could also hack around this with -O0, the CSE always happens at any opt level (a dirtier hack would be use -start-before/after). I'm not sure I understand how stackrestore helps here.

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I was able to get around the pre-SelectionDAG CSE by using the stackrestore which causes a addrspacecast to be added during DAG legalization, so that isn't a problem. However it seems like there is some post-ISel (perhaps DAG-CSE on the machine nodes?) which is preventing the impact of this change from being easily observed in the final output. That's why I'm using the debug output.

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-stop-after=finalize-isel might work for avoiding machine cse

define void @foo(ptr %p) {
; CHECK-LABEL: Initial selection DAG
;
; CHECK: [[ASC:t[0-9]+]]{{.*}} = addrspacecast
; CHECK: store{{.*}} [[ASC]]
; CHECK: store{{.*}} [[ASC]]
;
; CHECK-LABEL: Optimized lowered selection
;
%a1 = addrspacecast ptr %p to ptr addrspace(5)
%a2 = addrspacecast ptr %p to ptr addrspace(5)
store i32 0, ptr addrspace(5) %a1
store i32 0, ptr addrspace(5) %a2
ret void
}
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