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DE0_CPU_PINOUT_PCB.csv
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# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
# File: C:\Users\magnu\Documents\Git\EIT-4\DE0_CPU_PINOUT_PCB.csv
# Generated on: Wed May 23 16:57:50 2018
# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus II software.
To,Direction,Location,I/O Bank,VREF Group,Fitter Location,I/O Standard,Reserved,Current Strength,Slew Rate,Differential Pair
bclk,Input,PIN_AA9,3,B3_N0,PIN_AB14,,,,,
bclkO,Output,PIN_AB17,4,B4_N1,PIN_AA14,,,,,
btn[2],Input,PIN_F1,1,B1_N0,PIN_F1,,,,,
btn[1],Input,PIN_G3,1,B1_N0,PIN_G3,,,,,
btn[0],Input,PIN_H2,1,B1_N1,PIN_H2,,,,,
clk,Input,PIN_G21,6,B6_N1,PIN_G21,,,,,
Din,Input,PIN_AB9,3,B3_N0,PIN_AA13,,,,,
DOut,Output,PIN_T15,4,B4_N0,PIN_AB13,,,,,
led[9],Output,PIN_B1,1,B1_N0,PIN_B1,,,,,
led[8],Output,PIN_B2,1,B1_N0,PIN_B2,,,,,
led[7],Output,PIN_C2,1,B1_N0,PIN_C2,,,,,
led[6],Output,PIN_C1,1,B1_N0,PIN_C1,,,,,
led[5],Output,PIN_E1,1,B1_N0,PIN_E1,,,,,
led[4],Output,PIN_F2,1,B1_N0,PIN_F2,,,,,
led[3],Output,PIN_H1,1,B1_N1,PIN_H1,,,,,
led[2],Output,PIN_J3,1,B1_N1,PIN_J3,,,,,
led[1],Output,PIN_J2,1,B1_N1,PIN_J2,,,,,
led[0],Output,PIN_J1,1,B1_N1,PIN_J1,,,,,
sseg[31],Output,PIN_G16,7,B7_N0,PIN_G16,,,,,
sseg[30],Output,PIN_G15,7,B7_N0,PIN_G15,,,,,
sseg[29],Output,PIN_D19,7,B7_N0,PIN_D19,,,,,
sseg[28],Output,PIN_C19,7,B7_N0,PIN_C19,,,,,
sseg[27],Output,PIN_B19,7,B7_N0,PIN_B19,,,,,
sseg[26],Output,PIN_A19,7,B7_N0,PIN_A19,,,,,
sseg[25],Output,PIN_F15,7,B7_N0,PIN_F15,,,,,
sseg[24],Output,PIN_B18,7,B7_N0,PIN_B18,,,,,
sseg[23],Output,PIN_A18,7,B7_N0,PIN_A18,,,,,
sseg[22],Output,PIN_F14,7,B7_N0,PIN_F14,,,,,
sseg[21],Output,PIN_B17,7,B7_N1,PIN_B17,,,,,
sseg[20],Output,PIN_A17,7,B7_N1,PIN_A17,,,,,
sseg[19],Output,PIN_E15,7,B7_N0,PIN_E15,,,,,
sseg[18],Output,PIN_B16,7,B7_N1,PIN_B16,,,,,
sseg[17],Output,PIN_A16,7,B7_N1,PIN_A16,,,,,
sseg[16],Output,PIN_D15,7,B7_N0,PIN_D15,,,,,
sseg[15],Output,PIN_B15,7,B7_N1,PIN_B15,,,,,
sseg[14],Output,PIN_A15,7,B7_N1,PIN_A15,,,,,
sseg[13],Output,PIN_E14,7,B7_N1,PIN_E14,,,,,
sseg[12],Output,PIN_B14,7,B7_N1,PIN_B14,,,,,
sseg[11],Output,PIN_A14,7,B7_N1,PIN_A14,,,,,
sseg[10],Output,PIN_C13,7,B7_N1,PIN_C13,,,,,
sseg[9],Output,PIN_B13,7,B7_N1,PIN_B13,,,,,
sseg[8],Output,PIN_A13,7,B7_N1,PIN_A13,,,,,
sseg[7],Output,PIN_D13,7,B7_N1,PIN_D13,,,,,
sseg[6],Output,PIN_F13,7,B7_N1,PIN_F13,,,,,
sseg[5],Output,PIN_F12,7,B7_N1,PIN_F12,,,,,
sseg[4],Output,PIN_G12,7,B7_N1,PIN_G12,,,,,
sseg[3],Output,PIN_H13,7,B7_N1,PIN_H13,,,,,
sseg[2],Output,PIN_H12,7,B7_N1,PIN_H12,,,,,
sseg[1],Output,PIN_F11,7,B7_N1,PIN_F11,,,,,
sseg[0],Output,PIN_E11,7,B7_N1,PIN_E11,,,,,
ws,Input,PIN_V15,4,B4_N0,PIN_AB15,,,,,
wsO,Output,PIN_W17,4,B4_N0,PIN_AA15,,,,,
sw[8],Unknown,PIN_E4,1,B1_N0,,,,,,
sw[7],Unknown,PIN_E3,1,B1_N0,,,,,,
sw[6],Unknown,PIN_H7,1,B1_N0,,,,,,
sw[5],Unknown,PIN_J7,1,B1_N1,,,,,,
sw[4],Unknown,PIN_G5,1,B1_N0,,,,,,
sw[3],Unknown,PIN_G4,1,B1_N0,,,,,,
sw[2],Unknown,PIN_H6,1,B1_N0,,,,,,
sw[1],Unknown,PIN_H5,1,B1_N0,,,,,,
sw[0],Unknown,PIN_J6,1,B1_N0,,,,,,
DOut2,Unknown,PIN_R10,3,B3_N1,,,,,,
wsO2,Unknown,PIN_T8,3,B3_N1,,,,,,
bclkO2,Unknown,PIN_W7,3,B3_N1,,,,,,
clk_out,Unknown,PIN_V5,3,B3_N1,,,,,,
sw[9],Unknown,PIN_D2,1,B1_N0,,,,,,