PR #32812: [XLA:CPU] Add support for riscv64 #33519
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Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 828379922
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PR #32812: [XLA:CPU] Add support for riscv64
Imported from GitHub PR #32812
Co-author: @kxxt
📝 Summary of Changes:
This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure.
🎯 Justification:
The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures.
🚀 Kind of Contribution: ✨ New Feature
Copybara import of the project:
--
0d02393 by gns [email protected]:
[XLA:CPU] Add support for riscv64
Co-authored-by: Levi Zim [email protected]
--
5d95fb4 by gns [email protected]:
Refresh
rules_pythonriscv64 patchCo-authored-by: Levi Zim [email protected]
Merging this change closes #32812
FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4