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Pmolloy/rockchip boot modes #30

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bcb0c04
SUMMARY: Convert into an unordered list
pamolloy Apr 16, 2025
5246c25
rockchip: Document ROM boot modes
pamolloy Apr 16, 2025
6295ec8
SUMMARY: Add Rockchip
pamolloy Apr 16, 2025
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11 changes: 6 additions & 5 deletions src/SUMMARY.md
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[PSI Spec Introduction](intro.md)
[Mask ROMs and Loaders](mask-roms-loaders.md)
[Platform Initialization](platform-initialization.md)
[Boot Environments](boot-environments.md)
[Platform Security](platform-security.md)
- [PSI Spec Introduction](intro.md)
- [Mask ROMs and Loaders](mask-roms-loaders.md)
- [Rockchip](rockchip.md)
- [Platform Initialization](platform-initialization.md)
- [Boot Environments](boot-environments.md)
- [Platform Security](platform-security.md)
24 changes: 24 additions & 0 deletions src/rockchip.md
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# Rockchip

## RK3588

The boot ROM uses the internal 12-bit 1MS/s SARADC to read `SARADC_IN0_BOOT` on
power. It selects a boot mode based on the following table:

| ADC value | Voltage | Mode |
|-----------|---------|------|
| 0 | 0 | USB |
| 682 | 0.3 | SD card, USB |
| 1365 | 0.6 | eMMC, USB |
| 2047 | 0.9 | FSPI M0, USB |
| 2730 | 1.2 | FSPI M1, USB |
| 3412 | 1.5 | FSPI M2, USB |
| 4095 | 1.8 | FSPI M2, FSPI M1, FSPI M0, eMMC, SD card, USB |

It will search each device in the order listed above for a valid image.

`SARADC_IN0_BOOT` is often routed to a button, which when pressed is connected
to ground (i.e. 0 V) and otherwise is 1.8V.

Additional channels of the ADC may be routed to jumper headers to be used by
later boot loader stages.