Release v0.6.4

CHANGELOG.md

@@ -4,6 +4,24 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/en/1.0.0/)
 and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.html).
 
+
+## 0.6.4 - 2025-02-28
+
+### Added
+- Add tracing support to `inst64` [#52](https://github.com/pulp-platform/iDMA/pull/52).
+
+### Changed
+- Various fixes and small changes to upstream PULPv2/Chimera features. Combining PRs #49, #55, #56, #57 in [#66](https://github.com/pulp-platform/iDMA/pull/66).
+- Minor changes to fix linting [#54](https://github.com/pulp-platform/iDMA/pull/54).
+- Expand tracer to track more signals, increase Verilator support [#52](https://github.com/pulp-platform/iDMA/pull/52).
+
+### Fixed
+- Ensuring `r_dp_valid_i` is ready before accepting data [#67](https://github.com/pulp-platform/iDMA/pull/67).
+- Updated `upload-pages-artifact` to `v3` [#68](https://github.com/pulp-platform/iDMA/pull/68) and `upload-artifact` to `v4` to restore CI.
+- Fix `DMCPY` instruction in `inst64` front-end for multi-channel DMA operation [#65](https://github.com/pulp-platform/iDMA/pull/65).
+- Ensure correct `PageAddrWidth` in `legalizer` for transfers without bursts; fixes issue [#53](https://github.com/pulp-platform/iDMA/issues/51) and was merged as [#53](https://github.com/pulp-platform/iDMA/pull/53).
+
+
 ## 0.6.3 - 2024-07-02
 
 ### Added

README.md

@@ -34,13 +34,15 @@ The [latest documentation](https://pulp-platform.github.io/iDMA) can be accessed
 If you use iDMA in your work or research, you can cite us:
 
 ```
-@misc{benz2023highperformance,
-      title={A High-performance, Energy-efficient Modular {DMA} Engine Architecture},
-      author={Thomas Benz and Michael Rogenmoser and Paul Scheffler and Samuel Riedel and Alessandro Ottaviano and Andreas Kurth and Torsten Hoefler and Luca Benini},
-      year={2023},
-      eprint={2305.05240},
-      archivePrefix={arXiv},
-      primaryClass={cs.AR}
+@article{benz2023highperformance,
+  title={A high-performance, energy-efficient modular DMA engine architecture},
+  author={Benz, Thomas and Rogenmoser, Michael and Scheffler, Paul and Riedel, Samuel and Ottaviano, Alessandro and Kurth, Andreas and Hoefler, Torsten and Benini, Luca},
+  journal={IEEE Transactions on Computers},
+  volume={73},
+  number={1},
+  pages={263--277},
+  year={2023},
+  publisher={IEEE}
 }
 ```
 
@@ -166,13 +168,15 @@ The following systems/publications make use of iDMA:
 <p>
 
 ```
-@article{Scheffler2023SparseSS,
-  title={Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra},
-  author={Paul Scheffler and Florian Zaruba and Fabian Schuiki and Torsten Hoefler and Luca Benini},
-  journal={ArXiv},
+@article{scheffler2023sparse,
+  title={Sparse stream semantic registers: A lightweight ISA extension accelerating general sparse linear algebra},
+  author={Scheffler, Paul and Zaruba, Florian and Schuiki, Fabian and Hoefler, Torsten and Benini, Luca},
+  journal={IEEE Transactions on Parallel and Distributed Systems},
+  volume={34},
+  number={12},
+  pages={3147--3161},
   year={2023},
-  volume={abs/2305.05559},
-  url={https://api.semanticscholar.org/CorpusID:258564420}
+  publisher={IEEE}
 }
 ```
 
@@ -185,9 +189,12 @@ The following systems/publications make use of iDMA:
 <p>
 
 ```
-@article{benziguana,
+@inproceedings{benz2023iguana,
   title={Iguana: An End-to-End Open-Source Linux-capable RISC-V SoC in 130nm CMOS},
-  author={Benz, Thomas and Scheffler, Paul and Sch{\"o}nleber, Jannis and Benini, Luca}
+  author={Benz, Thomas and Scheffler, Paul and Sch{\"o}nleber, Jannis and Benini, Luca},
+  booktitle={RISC-V Summit Europe 2023},
+  year={2023},
+  organization={RISC-V International}
 }
 ```
 
@@ -200,13 +207,15 @@ The following systems/publications make use of iDMA:
 <p>
 
 ```
-@article{Ottaviano2023CheshireAL,
-  title={Cheshire: A Lightweight, Linux-Capable RISC-V Host Platform for Domain-Specific Accelerator Plug-In},
-  author={Alessandro Ottaviano and Thomas Emanuel Benz and Paul Scheffler and Luca Benini},
-  journal={ArXiv},
+@article{ottaviano2023cheshire,
+  title={Cheshire: A lightweight, linux-capable risc-v host platform for domain-specific accelerator plug-in},
+  author={Ottaviano, Alessandro and Benz, Thomas and Scheffler, Paul and Benini, Luca},
+  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
+  volume={70},
+  number={10},
+  pages={3777--3781},
   year={2023},
-  volume={abs/2305.04760},
-  url={https://api.semanticscholar.org/CorpusID:258557988}
+  publisher={IEEE}
 }
 ```
 
@@ -251,18 +260,35 @@ The following systems/publications make use of iDMA:
 </details>
 
 
+<details>
+<summary><b>SARIS: Accelerating stencil computations on energy-efficient RISC-V compute clusters with indirect stream registers</b></summary>
+<p>
+
+```
+@inproceedings{scheffler2024saris,
+  title={SARIS: Accelerating stencil computations on energy-efficient RISC-V compute clusters with indirect stream registers},
+  author={Scheffler, Paul and Colagrande, Luca and Benini, Luca},
+  booktitle={Proceedings of the 61st ACM/IEEE Design Automation Conference},
+  pages={1--6},
+  year={2024}
+}
+```
+
+</p>
+</details>
+
+
 <details>
 <summary><b>OSMOSIS: Enabling Multi-Tenancy in Datacenter SmartNICs</b></summary>
 <p>
 
 ```
-@article{Khalilov2023OSMOSISEM,
+@inproceedings{khalilov2024osmosis,
   title={OSMOSIS: Enabling Multi-Tenancy in Datacenter SmartNICs},
-  author={Mikhail Khalilov and Marcin Chrapek and Siyuan Shen and Alessandro Vezzu and Thomas Emanuel Benz and Salvatore Di Girolamo and Timo Schneider and Daniele Di Sensi and Luca Benini and Torsten Hoefler},
-  journal={ArXiv},
-  year={2023},
-  volume={abs/2309.03628},
-  url={https://api.semanticscholar.org/CorpusID:261582327}
+  author={Khalilov, Mikhail and Chrapek, Marcin and Shen, Siyuan and Vezzu, Alessandro and Benz, Thomas and Di Girolamo, Salvatore and Schneider, Timo and De Sensi, Daniele and Benini, Luca and Hoefler, Torsten},
+  booktitle={2024 USENIX Annual Technical Conference (USENIX ATC 24)},
+  pages={247--263},
+  year={2024}
 }
 ```
 
@@ -276,12 +302,15 @@ The following systems/publications make use of iDMA:
 
 ```
 @article{marques2024interrupting,
-  title={" Interrupting" the Status Quo: A First Glance at the RISC-V Advanced Interrupt Architecture (AIA)},
+  title={“Interrupting” the status quo: a first glance at the RISC-V advanced interrupt architecture (AIA)},
   author={Marques, Francisco and Rodr{\'\i}guez, Manuel and S{\'a}, Bruno and Pinto, Sandro},
   journal={IEEE Access},
+  volume={12},
+  pages={9822--9833},
   year={2024},
   publisher={IEEE}
 }
+
 ```
 
 </p>
@@ -293,20 +322,133 @@ The following systems/publications make use of iDMA:
 <p>
 
 ```
-@misc{benz2023axirealm,
-  title={AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs},
-  author={Thomas Benz and Alessandro Ottaviano and Robert Balas and Angelo Garofalo and Francesco Restuccia and Alessandro Biondi and Luca Benini},
-  year={2023},
-  eprint={2311.09662},
-  archivePrefix={arXiv},
-  primaryClass={cs.AR}
+@inproceedings{benz2024axi,
+  title={AXI-REALM: A lightweight and modular interconnect extension for traffic regulation and monitoring of heterogeneous real-time SoCs},
+  author={Benz, Thomas and Ottaviano, Alessandro and Balas, Robert and Garofalo, Angelo and Restuccia, Francesco and Biondi, Alessandro and Benini, Luca},
+  booktitle={2024 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
+  pages={1--6},
+  year={2024},
+  organization={IEEE}
+}
+```
+
+</p>
+</details>
+
+
+<details>
+<summary><b>FlooNoC: A 645-Gb/s/link 0.15-pJ/B/hop Open-Source NoC With Wide Physical Links and End-to-End AXI4 Parallel Multistream Support</b></summary>
+<p>
+
+```
+@article{fischer2025floonoc,
+  title={FlooNoC: A 645-Gb/s/link 0.15-pJ/B/hop Open-Source NoC With Wide Physical Links and End-to-End AXI4 Parallel Multistream Support},
+  author={Fischer, Tim and Rogenmoser, Michael and Benz, Thomas and G{\"u}rkaynak, Frank K and Benini, Luca},
+  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
+  year={2025},
+  publisher={IEEE}
+}
+```
+
+</p>
+</details>
+
+
+<details>
+<summary><b>Occamy: A 432-core 28.1 DP-GFLOP/s/W 83\% FPU utilization dual-chiplet, dual-HBM2E RISC-V-based accelerator for stencil and sparse linear algebra computations with 8-to-64-bit floating-point support in 12nm FinFET</b></summary>
+<p>
+
+```
+@inproceedings{paulin2024occamy,
+  title={Occamy: A 432-core 28.1 DP-GFLOP/s/W 83\% FPU utilization dual-chiplet, dual-HBM2E RISC-V-based accelerator for stencil and sparse linear algebra computations with 8-to-64-bit floating-point support in 12nm FinFET},
+  author={Paulin, Gianna and Scheffler, Paul and Benz, Thomas and Cavalcante, Matheus and Fischer, Tim and Eggimann, Manuel and Zhang, Yichao and Wistoff, Nils and Bertaccini, Luca and Colagrande, Luca and others},
+  booktitle={2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)},
+  pages={1--2},
+  year={2024},
+  organization={IEEE}
 }
 ```
 
 </p>
 </details>
 
 
+<details>
+<summary><b>ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5 D Systems-in-package</b></summary>
+<p>
+
+```
+@article{ottaviano2024controlpulplet,
+  title={ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5 D Systems-in-package},
+  author={Ottaviano, Alessandro and Balas, Robert and Fischer, Tim and Benz, Thomas and Bartolini, Andrea and Benini, Luca},
+  journal={arXiv preprint arXiv:2410.15985},
+  year={2024}
+}
+```
+
+</p>
+</details>
+
+
+<details>
+<summary><b>AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems</b></summary>
+<p>
+
+```
+@article{benz2025axi,
+  title={AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems},
+  author={Benz, Thomas and Ottaviano, Alessandro and Liang, Chaoqun and Balas, Robert and Garofalo, Angelo and Restuccia, Francesco and Biondi, Alessandro and Rossi, Davide and Benini, Luca},
+  journal={arXiv preprint arXiv:2501.10161},
+  year={2025}
+}
+```
+
+</p>
+</details>
+
+
+<details>
+<summary><b>Occamy: A 432-Core Dual-Chiplet Dual-HBM2E 768-DP-GFLOP/s RISC-V System for 8-to-64-bit Dense and Sparse Computing in 12-nm FinFET</b></summary>
+<p>
+
+```
+@article{scheffler2025occamy,
+  title={Occamy: A 432-Core Dual-Chiplet Dual-HBM2E 768-DP-GFLOP/s RISC-V System for 8-to-64-bit Dense and Sparse Computing in 12-nm FinFET},
+  author={Scheffler, Paul and Benz, Thomas and Potocnik, Viviane and Fischer, Tim and Colagrande, Luca and Wistoff, Nils and Zhang, Yichao and Bertaccini, Luca and Ottavi, Gianmarco and Eggimann, Manuel and others},
+  journal={IEEE Journal of Solid-State Circuits},
+  year={2025},
+  publisher={IEEE}
+}
+
+```
+
+</p>
+</details>
+
+
+<details>
+<summary><b>A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications</b></summary>
+<p>
+
+```
+@misc{garofalo2025reliabletimepredictableheterogeneoussoc,
+      title={A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications},
+      author={Angelo Garofalo and Alessandro Ottaviano and Matteo Perotti and Thomas Benz and Yvan Tortorella and Robert Balas and Michael Rogenmoser and Chi Zhang and Luca Bertaccini and Nils Wistoff and Maicol Ciani and Cyril Koenig and Mattia Sinigaglia and Luca Valente and Paul Scheffler and Manuel Eggimann and Matheus Cavalcante and Francesco Restuccia and Alessandro Biondi and Francesco Conti and Frank K. Gurkaynak and Davide Rossi and Luca Benini},
+      year={2025},
+      eprint={2502.18953},
+      archivePrefix={arXiv},
+      primaryClass={cs.AR},
+      url={https://arxiv.org/abs/2502.18953},
+}
+```
+
+</p>
+</details>
+
+
+
+
+
 ## License
 iDMA is released under Solderpad v0.51 (SHL-0.51) see [`LICENSE`](LICENSE):
 

VERSION

@@ -1 +1 @@
-0.6.3
+0.6.4