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[ET-VK] Quantized Int8 Linear #13816
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Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/13816
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This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
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still looking...
// Perform quantized linear transformation (matrix multiplication) | ||
for (int64_t b = 0; b < batch_size; ++b) { | ||
for (int64_t out_f = 0; out_f < out_features; ++out_f) { | ||
float sum = 0.0f; |
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No int32 accumulation in the reference? Why not use q->dq->linear->q->dq canonical pytorch pattern then?
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I updated the test file to use int accumulation for the 8bit activation quantized path, as you suggested!
* from prefill to decode. GEMM is typically a compute bound operation, which | ||
* will benefit from accelerated int8 accumulation. On the other hand, GEMV | ||
* is usually memory bound, which means it may actually suffer from the extra | ||
* cost of having to quantize and pack the input tensor. Therefore, |
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Did we benchmark this?
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Haven't had the time to validate - but decided to just go this path for now because weight only quant is needed anyway to support devices that don't have the int8 dot product extension + the fact that ML drift also utilizes this approach. I plan to do some more experimentation to confirm post GA
VEC4_T data[TILE_M][TILE_K4]; | ||
}; | ||
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#ifdef DEBUG_MODE |
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not defined otherwise?
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The usage of this is to be able to
#define DEBUG_MODE
in order to access debugging functions in the shader template.
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#include "linear_fp_input_tile.glslh" | ||
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#ifdef INPUT_BUFFER |
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Nit: why is this not inside load_input_x4
?
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that's a great point. I will include this + other ifdef cleanups in a follow up diff.
const int m_start, | ||
const int K4, | ||
const int M) { | ||
#if TILE_K4 == 1 |
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why do we need this specialization? Does compiler not do this for you?
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Yeah, I plan to simplify these ifdefs in my most recent diff.
const int m = out_tile_y * TILE_M; | ||
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const int n4 = div_4(n); | ||
const int m4 = div_4(m); |
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m4
seems redundant, remove?
const int out_tile_x = int(gl_GlobalInvocationID.x); | ||
const int out_tile_y = int(gl_GlobalInvocationID.y); |
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I am still trying to process this and figuring out what the right way to do this, but just as a hint, in absence of shared memory based memory reuse, at a high level, it feels like we want each local group to generate a tile of output tiles to ensure memory reuse on both weight tiles and input tiles.
IIUC this produces a row or a column of output tiles, but not a tile of tiles in 2D.
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Currently each thread produces a 4x4 output block. The header files have been configured to make the tile size configurable in groups of 4.
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
Title says it all! This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure. For both linear and convolution, two versions are implemented: 1. `q8ta_q8csw` variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extension 2. `q8csw` variant which dequantized the weight tensor in-shader and performs floating point accumulation. The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension. These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff. Differential Revision: [D81323424](https://our.internmc.facebook.com/intern/diff/D81323424/) [ghstack-poisoned]
This pull request was exported from Phabricator. Differential Revision: D81323424 |
6a61722
into
gh/SS-JIA/316/base
Stack from ghstack (oldest at bottom):
Title says it all!
This PR adds implementations for int8 linear layers. Convolution is implemented in a later step, computing convolution as matrix multiplication via the im2col procedure.
For both linear and convolution, two versions are implemented:
q8ta_q8csw
variant which quantized the input tensor and then performs integer accumulation via the int8 dot product extensionq8csw
variant which dequantized the weight tensor in-shader and performs floating point accumulation.The second one is needed to provide an alternative path for executing quantized models if the target GPU does not support int8 dot product extension.
These new ops are tested via the custom op testing + benchmarking framework introduced in the previous diff.
Differential Revision: D81323424