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Updated 80286 and 80386 pages
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jeffpar committed Apr 25, 2023
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8 changes: 0 additions & 8 deletions documents/manuals/intel/80286/progref/index.md

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14 changes: 5 additions & 9 deletions documents/manuals/intel/80386/index.md
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Expand Up @@ -194,7 +194,7 @@ rather than with an ID number.

#### B1 Stepping

From a December 17, 1986 Intel document titled "**80386-B1 STEPPING INFORMATION**":
From a December 17, 1986 Intel document titled "[80386-B1 STEPPING INFORMATION](files/80386-B1--1986-12-17.pdf)":

80386-B1 component identifier readable in DH after reset: 03H
80386-B1 revision identifier readable in DL after reset: 03H
Expand Down Expand Up @@ -570,8 +570,7 @@ Here's what the world knew about 80386 problems in the B1 stepping, as of Decemb

**Workaround**: No workaround is necessary in a working system.

An errata update dated March 26, 1987, produced internally by IBM rather than Intel, noted two additional
issues:
[80386 Errata from March 26, 1987](files/80386-B1--1987-03-26.pdf), produced internally by IBM rather than Intel, noted two additional issues:

+ Maximum Sized Segments Need Alignment
+ CR3/TRx Move Corrupts LIP (Linear Instruction Pointer)
Expand All @@ -588,15 +587,12 @@ than the double fault (exception 8) handler. A subsequent fault, though, will le

> Workaround: No workaround is necessary in a working system.
On April 30, 1987, another errata update omitted #18, as well as the two new issues documented by IBM
(which, like #18, Intel must have decided were not significant problems "in a working system"), and added
the following:
[80386 Errata from April 30, 1987](files/80386-B1--1987-04-30.pdf) omitted #18, as well as the two new issues documented by IBM (which, like #18, Intel must have decided were not significant problems "in a working system"), and added the following:

+ Breakpoints Malfunction after Reading CR3, TR6, or TR7
+ Return Address Incorrect for Segment Limit Fault during FNINIT

On September 1, 1987, the final 80386-B1 errata update that I'm aware of continued to list previous errata (#1-#17),
plus the two errata from April 30 (#18 and #19), along with the following new errata:
[80386 Errata from September 1, 1987](files/80386-B1--1987-09-01.pdf), the final 80386-B1 errata update that I'm aware of, continued to list previous errata (#1-#17), plus the two errata from April 30 (#18 and #19), along with the following new errata:

+ VERR/VERW/LAR/LSL Instructions Malfunction with Bad Selector
+ Coprocessor Malfunctions with Paging Enabled
Expand Down Expand Up @@ -792,7 +788,7 @@ a double sigma sign. All 80386s produced after the B1 stepping should be free of
#### C0 Stepping

The only information we have regarding the C0 stepping comes from a March 30, 1987 document titled
"**80386-C0 STEPPING INFORMATION**":
"[80386-C0 STEPPING INFORMATION](files/80386-C0--1987-03-30.pdf)":

80386-C0 component identifier readable in DH after reset: 03H
80386-C0 revision identifier readable in DL after reset: 04H
Expand Down
4 changes: 1 addition & 3 deletions documents/manuals/intel/80386/loadall/index.md
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Expand Up @@ -5,7 +5,7 @@ permalink: /documents/manuals/intel/80386/loadall/
redirect_from: /pubs/pc/reference/intel/80386/loadall/
---

[The following information is from an undated 6-page Intel "Internal Correspondence" document]
[The following information is from an undated 6-page Intel "[Internal Correspondence](../files/80386--LOADALL.pdf)" document]

### LOADALL (0F07H)

Expand Down Expand Up @@ -273,5 +273,3 @@ loaded for a page granular segment gives a byte granular limit, so should contai
0C0 | ES(AR)
0C4 | ES(BASE)
0C8 | ES(LIMIT)

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7 changes: 0 additions & 7 deletions documents/manuals/intel/80386/real_mode/index.md

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7 changes: 0 additions & 7 deletions documents/manuals/intel/80386/virtual_io/index.md

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67 changes: 25 additions & 42 deletions machines/documents.json
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Expand Up @@ -1152,7 +1152,7 @@
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Expand Down Expand Up @@ -1197,113 +1197,89 @@
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Expand All @@ -1327,6 +1303,13 @@
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