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10 changes: 10 additions & 0 deletions src/device/blk.rs
Original file line number Diff line number Diff line change
Expand Up @@ -378,6 +378,16 @@ impl<H: Hal, T: Transport> VirtIOBlk<H, T> {
pub fn virt_queue_size(&self) -> u16 {
QUEUE_SIZE
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
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Why are these methods needed on every device? I would have thought that the MSI-X configuration would happen during the initial setup of the device, either before passing the transport to the device driver or inside the driver. How do you expect them to be used?

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it worked better in my code to set up the interrupt later, after everything else is configured. so i added methods to expose the transport. this seems useful either way?

}

impl<H: Hal, T: Transport> Drop for VirtIOBlk<H, T> {
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10 changes: 10 additions & 0 deletions src/device/console.rs
Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,16 @@ impl<H: Hal, T: Transport> VirtIOConsole<H, T> {
Err(Error::Unsupported)
}
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
}

impl<H: Hal, T: Transport> Write for VirtIOConsole<H, T> {
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10 changes: 10 additions & 0 deletions src/device/gpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -181,6 +181,16 @@
Ok(())
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}

/// Send a request to the device and block for a response.
fn request<Req: IntoBytes + Immutable, Rsp: FromBytes>(&mut self, req: Req) -> Result<Rsp> {
req.write_to_prefix(&mut self.queue_buf_send).unwrap();
Expand Down Expand Up @@ -264,7 +274,7 @@
rsp.check_type(Command::OK_NODATA)
}

fn update_cursor(

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&mut self,
resource_id: u32,
scanout_id: u32,
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10 changes: 10 additions & 0 deletions src/device/input.rs
Original file line number Diff line number Diff line change
Expand Up @@ -196,6 +196,16 @@ impl<H: Hal, T: Transport> VirtIOInput<H, T> {
Err(Error::IoError)
}
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
}

// SAFETY: The config space can be accessed from any thread.
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10 changes: 10 additions & 0 deletions src/device/net/dev.rs
Original file line number Diff line number Diff line change
Expand Up @@ -122,4 +122,14 @@ impl<H: Hal, T: Transport, const QUEUE_SIZE: usize> VirtIONet<H, T, QUEUE_SIZE>
pub fn send(&mut self, tx_buf: TxBuffer) -> Result {
self.inner.send(tx_buf.packet())
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
self.inner.transport()
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
self.inner.transport_mut()
}
}
10 changes: 10 additions & 0 deletions src/device/net/dev_raw.rs
Original file line number Diff line number Diff line change
Expand Up @@ -266,6 +266,16 @@ impl<H: Hal, T: Transport, const QUEUE_SIZE: usize> VirtIONetRaw<H, T, QUEUE_SIZ
// SAFETY: This `rx_buf` is the same one passed to `receive_begin`.
unsafe { self.receive_complete(token, rx_buf) }
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
}

impl<H: Hal, T: Transport, const QUEUE_SIZE: usize> Drop for VirtIONetRaw<H, T, QUEUE_SIZE> {
Expand Down
10 changes: 10 additions & 0 deletions src/device/rng.rs
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,16 @@ impl<H: Hal, T: Transport> VirtIORng<H, T> {
pub fn ack_interrupt(&mut self) -> bool {
self.transport.ack_interrupt()
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
}

impl<H: Hal, T: Transport> Drop for VirtIORng<H, T> {
Expand Down
10 changes: 10 additions & 0 deletions src/device/socket/vsock.rs
Original file line number Diff line number Diff line change
Expand Up @@ -424,6 +424,16 @@ impl<H: Hal, T: Transport, const RX_BUFFER_SIZE: usize> VirtIOSocket<H, T, RX_BU
Ok(())
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}

fn send_packet_to_tx_queue(&mut self, header: &VirtioVsockHdr, buffer: &[u8]) -> Result {
let _len = if buffer.is_empty() {
self.tx
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10 changes: 10 additions & 0 deletions src/device/sound.rs
Original file line number Diff line number Diff line change
Expand Up @@ -362,7 +362,7 @@
}

/// Set selected stream parameters for the specified stream ID.
pub fn pcm_set_params(

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&mut self,
stream_id: u32,
buffer_bytes: u32,
Expand Down Expand Up @@ -726,6 +726,16 @@
}
})
}

/// Get the underlying transport.
pub fn transport(&self) -> &T {
&self.transport
}

/// Get the underlying transport.
pub fn transport_mut(&mut self) -> &mut T {
&mut self.transport
}
}

/// The status of the PCM stream.
Expand Down
26 changes: 25 additions & 1 deletion src/transport/pci.rs
Original file line number Diff line number Diff line change
Expand Up @@ -366,6 +366,30 @@ impl Transport for PciTransport {
}
}

impl PciTransport {
/// Get the MSI-X vector for config.
pub fn get_config_msix_vector(&self) -> u16 {
field_shared!(self.common_cfg, config_msix_vector).read()
}

/// Set the MSI-X vector for config.
pub fn set_config_msix_vector(&mut self, vector: u16) {
field!(self.common_cfg, config_msix_vector).write(vector);
}

/// Get the MSI-X vector for a queue.
pub fn get_queue_msix_vector(&mut self, queue: u16) -> u16 {
field!(self.common_cfg, queue_select).write(queue);
field_shared!(self.common_cfg, queue_msix_vector).read()
}

/// Set the MSI-X vector for a queue.
pub fn set_queue_msix_vector(&mut self, queue: u16, vector: u16) {
field!(self.common_cfg, queue_select).write(queue);
field!(self.common_cfg, queue_msix_vector).write(vector);
}
}

// SAFETY: MMIO can be done from any thread or CPU core.
unsafe impl Send for PciTransport {}

Expand All @@ -388,7 +412,7 @@ pub(crate) struct CommonCfg {
pub device_feature: ReadPure<u32>,
pub driver_feature_select: ReadPureWrite<u32>,
pub driver_feature: ReadPureWrite<u32>,
pub msix_config: ReadPureWrite<u16>,
pub config_msix_vector: ReadPureWrite<u16>,
pub num_queues: ReadPure<u16>,
pub device_status: ReadPureWrite<u8>,
pub config_generation: ReadPure<u8>,
Expand Down
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