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Adds ARMv6 targets. #98

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9 changes: 9 additions & 0 deletions .cargo/config.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -16,12 +16,21 @@ runner = "qemu-system-arm -machine versatileab -cpu cortex-a8 -semihosting -nogr
[target.armv7a-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu cortex-a8 -semihosting -nographic -audio none -kernel"

[target.armv6-none-eabihf]
runner = "qemu-system-arm -machine versatileab -cpu arm1176 -semihosting -nographic -audio none -kernel"

[target.armv6-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu arm1176 -semihosting -nographic -audio none -kernel"

[target.armv5te-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu arm926 -semihosting -nographic -audio none -kernel"

[target.armv4t-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu arm926 -semihosting -nographic -audio none -kernel"

[target.thumbv6-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu arm1176 -semihosting -nographic -audio none -kernel"

[target.thumbv5te-none-eabi]
runner = "qemu-system-arm -machine versatileab -cpu arm926 -semihosting -nographic -audio none -kernel"

Expand Down
12 changes: 10 additions & 2 deletions aarch32-cpu/src/register/cpsr.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,11 @@ impl Cpsr {
/// `thumb*` targets, as Thumb-1 cannot do an MRS.
#[cfg_attr(not(feature = "check-asm"), inline)]
#[cfg_attr(
any(arm_architecture = "v4t", arm_architecture = "v5te"),
any(
arm_architecture = "v4t",
arm_architecture = "v5te",
arm_architecture = "v6"
),
instruction_set(arm::a32)
)]
pub fn read() -> Self {
Expand Down Expand Up @@ -108,7 +112,11 @@ impl Cpsr {
/// `thumb*` targets, as Thumb-1 cannot do an MSR.
#[cfg_attr(not(feature = "check-asm"), inline)]
#[cfg_attr(
any(arm_architecture = "v4t", arm_architecture = "v5te"),
any(
arm_architecture = "v4t",
arm_architecture = "v5te",
arm_architecture = "v6"
),
instruction_set(arm::a32)
)]
pub unsafe fn write(_value: Self) {
Expand Down
12 changes: 10 additions & 2 deletions aarch32-cpu/src/register/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -225,7 +225,11 @@ pub trait SysRegRead: SysReg {
/// may have side-effects.
#[cfg_attr(not(feature = "check-asm"), inline)]
#[cfg_attr(
any(arm_architecture = "v4t", arm_architecture = "v5te"),
any(
arm_architecture = "v4t",
arm_architecture = "v5te",
arm_architecture = "v6"
),
instruction_set(arm::a32)
)]
unsafe fn read_raw() -> u32 {
Expand Down Expand Up @@ -261,7 +265,11 @@ pub trait SysRegWrite: SysReg {
/// writing valid data here.
#[cfg_attr(not(feature = "check-asm"), inline)]
#[cfg_attr(
any(arm_architecture = "v4t", arm_architecture = "v5te"),
any(
arm_architecture = "v4t",
arm_architecture = "v5te",
arm_architecture = "v6"
),
instruction_set(arm::a32)
)]
unsafe fn write_raw(_value: u32) {
Expand Down
25 changes: 24 additions & 1 deletion arm-targets/src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -224,7 +224,10 @@ impl Arch {
Some(Arch::Armv7A)
} else if target.starts_with("aarch64-") || target.starts_with("aarch64be-") {
Some(Arch::Armv8A)
} else if target.starts_with("arm-") {
} else if target.starts_with("arm-")
|| target.starts_with("armv6-")
|| target.starts_with("thumbv6-")
{
// If not specified, assume Armv6
Some(Arch::Armv6)
} else {
Expand Down Expand Up @@ -409,6 +412,26 @@ mod test {
assert_eq!(target_info.abi(), Some(Abi::Eabi));
}

#[test]
fn armv6_none_eabi() {
let target = "armv6-none-eabi";
let target_info = process_target(target);
assert_eq!(target_info.isa(), Some(Isa::A32));
assert_eq!(target_info.arch(), Some(Arch::Armv6));
assert_eq!(target_info.profile(), Some(Profile::Legacy));
assert_eq!(target_info.abi(), Some(Abi::Eabi));
}

#[test]
fn armv6_none_eabihf() {
let target = "armv6-none-eabihf";
let target_info = process_target(target);
assert_eq!(target_info.isa(), Some(Isa::A32));
assert_eq!(target_info.arch(), Some(Arch::Armv6));
assert_eq!(target_info.profile(), Some(Profile::Legacy));
assert_eq!(target_info.abi(), Some(Abi::EabiHf));
}

#[test]
fn arm_unknown_linux_gnueabi() {
let target = "arm-unknown-linux-gnueabi";
Expand Down
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-a32-armv6-none-eabi.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-a32-armv6-none-eabihf.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-a32-thumbv6-none-eabi.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_a32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-t32-armv6-none-eabi.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-t32-armv6-none-eabihf.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
14 changes: 14 additions & 0 deletions examples/versatileab/reference/abt-exception-t32-thumbv6-none-eabi.out
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Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
Hello, this is an data abort exception example
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Doing it again
data abort occurred
DFSR (Fault Status Register): DFSR { ext=false wnr=false Domain=0b0000 Status=0b00001 }
DFSR Status: Ok(AlignmentFault)
caught unaligned_from_t32
caught fault on COUNTER
Skipping instruction
Recovered from fault OK!
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