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2 parents c659647 + d545e84 commit abd5d05Copy full SHA for abd5d05
crates/core_simd/src/simd/num/float.rs
@@ -263,7 +263,8 @@ macro_rules! impl_trait {
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unsafe { core::intrinsics::simd::simd_as(self) }
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}
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- // https://github.com/llvm/llvm-project/issues/94694
+ // workaround for https://github.com/llvm/llvm-project/issues/94694 (fixed in LLVM 20)
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+ // tracked in: https://github.com/rust-lang/rust/issues/135982
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#[cfg(target_arch = "aarch64")]
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#[inline]
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fn cast<T: SimdCast>(self) -> Self::Cast<T>
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