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4 changes: 2 additions & 2 deletions compiler/rustc_target/src/asm/aarch64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -59,9 +59,9 @@ impl AArch64InlineAsmRegClass {
match self {
Self::reg => types! { _: I8, I16, I32, I64, F32, F64; },
Self::vreg | Self::vreg_low16 => types! {
neon: I8, I16, I32, I64, F32, F64,
neon: I8, I16, I32, I64, F16, F32, F64,
VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2);
VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF16(4),VecF16(8),VecF32(4), VecF64(2);
},
Self::preg => &[],
}
Expand Down
2 changes: 1 addition & 1 deletion src/doc/reference
Submodule reference updated 1 files
+1 −3 src/items/unions.md
2 changes: 1 addition & 1 deletion src/tools/cargo
Submodule cargo updated 270 files
2 changes: 1 addition & 1 deletion tests/ui/asm/aarch64/type-check-3.stderr
Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@ error: type `Simd256bit` cannot be used with this register class
LL | asm!("{}", in(vreg) f64x4);
| ^^^^^
|
= note: register class `vreg` supports these types: i8, i16, i32, i64, f32, f64, i8x8, i16x4, i32x2, i64x1, f32x2, f64x1, i8x16, i16x8, i32x4, i64x2, f32x4, f64x2
= note: register class `vreg` supports these types: i8, i16, i32, i64, f16, f32, f64, i8x8, i16x4, i32x2, i64x1, f32x2, f64x1, i8x16, i16x8, i32x4, i64x2, f16x4, f16x8, f32x4, f64x2

error: incompatible types for asm inout argument
--> $DIR/type-check-3.rs:88:33
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21 changes: 21 additions & 0 deletions tests/ui/asm/aarch64/type-f16.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
//@ only-aarch64
//@ run-pass

#![feature(f16, f128)]
use std::arch::asm;
#[inline(never)]
pub fn f32_to_f16_asm(a: f32) -> f16 {
let ret: f16;
unsafe {
asm!(
"fcvt {ret:h}, {a:s}",
a = in(vreg) a,
ret = lateout(vreg) ret,
options(nomem, nostack),
);
}
ret
}
fn main() {
assert_eq!(f32_to_f16_asm(1.0 as f32), 1.0);
}