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Implement avx512 masked load and store intrinsics #1254

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Merged
merged 11 commits into from
Dec 4, 2021
Merged

Implement avx512 masked load and store intrinsics #1254

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6f6d59b
Implement avx512f masked unaligned load and store intrinsics
jhorstmann Nov 15, 2021
c902d90
Reduce code repetition using macros and implement avx512vl load and s…
jhorstmann Nov 20, 2021
7fe1b6b
Not using macros, adding more tests
jhorstmann Nov 21, 2021
b9329bd
Tests for mm512 aligned stores
jhorstmann Nov 23, 2021
ce1f051
Tests for 256-bit variants
jhorstmann Nov 27, 2021
5f028ad
Change tests to store into slices
jhorstmann Nov 27, 2021
c3b7347
Tests for 128-bit variants
jhorstmann Nov 27, 2021
2c22e09
Update avx512f checklist
jhorstmann Nov 27, 2021
1f7d501
Add avx512bw masked load and stores
jhorstmann Nov 28, 2021
7d28014
Tests for avx512bw masked loads and stores
jhorstmann Nov 28, 2021
53f193b
Using xmm registers seems to require sse target_feature on CI
jhorstmann Nov 28, 2021
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146 changes: 73 additions & 73 deletions crates/core_arch/avx512f.md
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Original file line number Diff line number Diff line change
Expand Up @@ -1784,113 +1784,113 @@
* [x] [`_mm512_setzero_si512`]
* [x] [`_mm512_setzero`]
* [x] [`_mm512_load_epi32`]
* [ ] [`_mm512_mask_load_epi32`] //need i1
* [ ] [`_mm512_maskz_load_epi32`] //need i1
* [x] [`_mm512_mask_load_epi32`] //need i1
* [x] [`_mm512_maskz_load_epi32`] //need i1
* [x] [`_mm_load_epi32`]
* [_] [`_mm_mask_load_epi32`] //need i1
* [_] [`_mm_maskz_load_epi32`] //need i1
* [x] [`_mm_mask_load_epi32`] //need i1
* [x] [`_mm_maskz_load_epi32`] //need i1
* [x] [`_mm256_load_epi32`]
* [_] [`_mm256_mask_load_epi32`] //need i1
* [_] [`_mm256_maskz_load_epi32`] //need i1
* [x] [`_mm256_mask_load_epi32`] //need i1
* [x] [`_mm256_maskz_load_epi32`] //need i1
* [x] [`_mm512_load_epi64`]
* [ ] [`_mm512_mask_load_epi64`] //need i1
* [ ] [`_mm512_maskz_load_epi64`] //need i1
* [x] [`_mm512_mask_load_epi64`] //need i1
* [x] [`_mm512_maskz_load_epi64`] //need i1
* [x] [`_mm_load_epi64`] //need i1
* [_] [`_mm_mask_load_epi64`] //need i1
* [_] [`_mm_maskz_load_epi64`] //need i1
* [x] [`_mm_mask_load_epi64`] //need i1
* [x] [`_mm_maskz_load_epi64`] //need i1
* [x] [`_mm256_load_epi64`] //need i1
* [_] [`_mm256_mask_load_epi64`] //need i1
* [_] [`_mm256_maskz_load_epi64`] //need i1
* [x] [`_mm256_mask_load_epi64`] //need i1
* [x] [`_mm256_maskz_load_epi64`] //need i1
* [x] [`_mm512_load_ps`]
* [ ] [`_mm512_mask_load_ps`] //need i1
* [ ] [`_mm512_maskz_load_ps`] //need i1
* [_] [`_mm_maskz_load_ps`] //need i
* [_] [`_mm_mask_load_ps`] //need i1
* [_] [`_mm_maskz_load_ps`] //need i1
* [_] [`_mm256_mask_load_ps`] //need i1
* [_] [`_mm256_maskz_load_ps`] //need i1
* [x] [`_mm512_mask_load_ps`] //need i1
* [x] [`_mm512_maskz_load_ps`] //need i1
* [x] [`_mm_maskz_load_ps`] //need i
* [x] [`_mm_mask_load_ps`] //need i1
* [x] [`_mm_maskz_load_ps`] //need i1
* [x] [`_mm256_mask_load_ps`] //need i1
* [x] [`_mm256_maskz_load_ps`] //need i1
* [x] [`_mm512_load_pd`]
* [ ] [`_mm512_mask_load_pd`] //need i1
* [ ] [`_mm512_maskz_load_pd`] //need i1
* [_] [`_mm_mask_load_pd`] //need i1
* [_] [`_mm_maskz_load_pd`] //need i1
* [_] [`_mm256_mask_load_pd`] //need i1
* [_] [`_mm256_maskz_load_pd`] //need i1
* [x] [`_mm512_mask_load_pd`] //need i1
* [x] [`_mm512_maskz_load_pd`] //need i1
* [x] [`_mm_mask_load_pd`] //need i1
* [x] [`_mm_maskz_load_pd`] //need i1
* [x] [`_mm256_mask_load_pd`] //need i1
* [x] [`_mm256_maskz_load_pd`] //need i1
* [x] [`_mm512_load_si512`]
* [x] [`_mm512_loadu_epi32`]
* [ ] [`_mm512_mask_loadu_epi32`] //need i1
* [x] [`_mm512_mask_loadu_epi32`] //need i1
* [x] [`_mm_loadu_epi32`]
* [_] [`_mm_mask_loadu_epi32`] //need i1
* [_] [`_mm_maskz_loadu_epi32`] //need i1
* [ ] [`_mm512_maskz_loadu_epi32`] //need i1
* [x] [`_mm_mask_loadu_epi32`] //need i1
* [x] [`_mm_maskz_loadu_epi32`] //need i1
* [x] [`_mm512_maskz_loadu_epi32`] //need i1
* [x] [`_mm256_loadu_epi32`]
* [_] [`_mm256_mask_loadu_epi32`] //need i1
* [_] [`_mm256_maskz_loadu_epi32`] //need i1
* [x] [`_mm256_mask_loadu_epi32`] //need i1
* [x] [`_mm256_maskz_loadu_epi32`] //need i1
* [x] [`_mm512_loadu_epi64`]
* [ ] [`_mm512_mask_loadu_epi64`] //need i1
* [ ] [`_mm512_maskz_loadu_epi64`] //need i1
* [x] [`_mm512_mask_loadu_epi64`] //need i1
* [x] [`_mm512_maskz_loadu_epi64`] //need i1
* [x] [`_mm_loadu_epi64`]
* [_] [`_mm_mask_loadu_epi64`] //need i1
* [_] [`_mm_maskz_loadu_epi64`] //need i1
* [x] [`_mm_mask_loadu_epi64`] //need i1
* [x] [`_mm_maskz_loadu_epi64`] //need i1
* [x] [`_mm256_loadu_epi64`]
* [_] [`_mm256_mask_loadu_epi64`] //need i1
* [_] [`_mm256_maskz_loadu_epi64`] //need i1
* [x] [`_mm256_mask_loadu_epi64`] //need i1
* [x] [`_mm256_maskz_loadu_epi64`] //need i1
* [x] [`_mm512_loadu_ps`]
* [ ] [`_mm512_mask_loadu_ps`] //need i1
* [ ] [`_mm512_maskz_loadu_ps`] //need i1
* [_] [`_mm_mask_loadu_ps`] //need i1
* [_] [`_mm_maskz_loadu_ps`] //need i1
* [_] [`_mm256_mask_loadu_ps`] //need i1
* [_] [`_mm256_maskz_loadu_ps`] //need i1
* [x] [`_mm512_mask_loadu_ps`] //need i1
* [x] [`_mm512_maskz_loadu_ps`] //need i1
* [x] [`_mm_mask_loadu_ps`] //need i1
* [x] [`_mm_maskz_loadu_ps`] //need i1
* [x] [`_mm256_mask_loadu_ps`] //need i1
* [x] [`_mm256_maskz_loadu_ps`] //need i1
* [x] [`_mm512_loadu_pd`]
* [ ] [`_mm512_mask_loadu_pd`] //need i1
* [ ] [`_mm512_maskz_loadu_pd`] //need i1
* [_] [`_mm_mask_loadu_pd`] //need i1
* [_] [`_mm_maskz_loadu_pd`] //need i1
* [_] [`_mm256_mask_loadu_pd`] //need i1
* [_] [`_mm256_maskz_loadu_pd`] //need i1
* [x] [`_mm512_mask_loadu_pd`] //need i1
* [x] [`_mm512_maskz_loadu_pd`] //need i1
* [x] [`_mm_mask_loadu_pd`] //need i1
* [x] [`_mm_maskz_loadu_pd`] //need i1
* [x] [`_mm256_mask_loadu_pd`] //need i1
* [x] [`_mm256_maskz_loadu_pd`] //need i1
* [x] [`_mm512_loadu_si512`]
* [x] [`_mm512_store_epi32`]
* [ ] [`_mm512_mask_store_epi32`] //need i1
* [_] [`_mm_mask_store_epi32`] //need i1
* [x] [`_mm512_mask_store_epi32`] //need i1
* [x] [`_mm_mask_store_epi32`] //need i1
* [x] [`_mm_store_epi32`]
* [_] [`_mm256_mask_store_epi32`] //need i1
* [x] [`_mm256_mask_store_epi32`] //need i1
* [x] [`_mm256_store_epi32`]
* [x] [`_mm512_store_epi64`]
* [ ] [`_mm512_mask_store_epi64`] //need i1
* [_] [`_mm_mask_store_epi64`] //need i1
* [x] [`_mm512_mask_store_epi64`] //need i1
* [x] [`_mm_mask_store_epi64`] //need i1
* [x] [`_mm_store_epi64`]
* [_] [`_mm256_mask_store_epi64`] //need i1
* [x] [`_mm256_mask_store_epi64`] //need i1
* [x] [`_mm256_store_epi64`]
* [x] [`_mm512_store_ps`]
* [ ] [`_mm512_mask_store_ps`] //need i1
* [_] [`_mm_mask_store_ps`] //need i1
* [_] [`_mm256_mask_store_ps`] //need i1
* [x] [`_mm512_mask_store_ps`] //need i1
* [x] [`_mm_mask_store_ps`] //need i1
* [x] [`_mm256_mask_store_ps`] //need i1
* [x] [`_mm512_store_pd`]
* [ ] [`_mm512_mask_store_pd`] //need i1
* [_] [`_mm_mask_store_pd`] //need i1
* [_] [`_mm256_mask_store_pd`] //need i1
* [x] [`_mm512_mask_store_pd`] //need i1
* [x] [`_mm_mask_store_pd`] //need i1
* [x] [`_mm256_mask_store_pd`] //need i1
* [x] [`_mm512_store_si512`]
* [x] [`_mm512_storeu_epi32`]
* [ ] [`_mm512_mask_storeu_epi32`] //need i1
* [_] [`_mm_mask_storeu_epi32`] //need i1
* [x] [`_mm512_mask_storeu_epi32`] //need i1
* [x] [`_mm_mask_storeu_epi32`] //need i1
* [x] [`_mm_storeu_epi32`]
* [_] [`_mm256_mask_storeu_epi32`] //need i1
* [x] [`_mm256_mask_storeu_epi32`] //need i1
* [x] [`_mm256_storeu_epi32`]
* [x] [`_mm512_storeu_epi64`]
* [ ] [`_mm512_mask_storeu_epi64`] //need i1
* [_] [`_mm_mask_storeu_epi64`] //need i1
* [x] [`_mm512_mask_storeu_epi64`] //need i1
* [x] [`_mm_mask_storeu_epi64`] //need i1
* [x] [`_mm_storeu_epi64`]
* [_] [`_mm256_mask_storeu_epi64`] //need i1
* [x] [`_mm256_mask_storeu_epi64`] //need i1
* [x] [`_mm256_storeu_epi64`]
* [x] [`_mm512_storeu_ps`]
* [ ] [`_mm512_mask_storeu_ps`] //need i1
* [_] [`_mm_mask_storeu_ps`] //need i1
* [_] [`_mm256_mask_storeu_ps`] //need i1
* [x] [`_mm512_mask_storeu_ps`] //need i1
* [x] [`_mm_mask_storeu_ps`] //need i1
* [x] [`_mm256_mask_storeu_ps`] //need i1
* [x] [`_mm512_storeu_pd`]
* [ ] [`_mm512_mask_storeu_pd`] //need i1
* [_] [`_mm_mask_storeu_pd`] //need i1
* [_] [`_mm256_mask_storeu_pd`] //need i1
* [x] [`_mm512_mask_storeu_pd`] //need i1
* [x] [`_mm_mask_storeu_pd`] //need i1
* [x] [`_mm256_mask_storeu_pd`] //need i1
* [x] [`_mm512_storeu_si512`]
* [ ] [`_mm512_stream_load_si512`] //stream_load_si256, ... not implment yet
* [x] [`_mm512_stream_pd`]
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