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Add regression test for issue #1184.
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This checks the temporary fix of outputing a suitable "sorry" message.
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martinwhitaker committed Dec 31, 2024
1 parent 84848e8 commit f3abd94
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1 change: 1 addition & 0 deletions ivtest/gold/br_gh1184-vvp-stderr.gold
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sorry: multi-bit module path delays are currently not fully supported.
6 changes: 6 additions & 0 deletions ivtest/gold/br_gh1184-vvp-stdout.gold
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57 changes: 57 additions & 0 deletions ivtest/ivltests/br_gh1184.v
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module dut(input wire [1:0] i, output wire [1:0] o);

assign o = i;

specify
specparam tRISE = 1;
specparam tFALL = 2;

(i => o) = (tRISE, tFALL);
endspecify

endmodule

module test();

reg [1:0] i;
wire [1:0] o;

dut dut(i, o);

reg failed = 0;

initial begin
#1 $monitor("%0t %b %b", $time, i, o);

i = 2'b00;
#0 if (o !== 2'bxx) failed = 1;
#1; #0 if (o !== 2'bxx) failed = 1;
#1; #0 if (o !== 2'b00) failed = 1;
#1; #0 if (o !== 2'b00) failed = 1;

i = 2'b11;
#0 if (o !== 2'b00) failed = 1;
#1; #0 if (o !== 2'b11) failed = 1;
#1; #0 if (o !== 2'b11) failed = 1;
#1; #0 if (o !== 2'b11) failed = 1;

i = 2'b10;
#0 if (o !== 2'b11) failed = 1;
#1; #0 if (o !== 2'b11) failed = 1;
#1; #0 if (o !== 2'b10) failed = 1;
#1; #0 if (o !== 2'b10) failed = 1;

i = 2'b01;
#0 if (o !== 2'b10) failed = 1;
#1; #0 if (o !== 2'b11) failed = 1;
#1; #0 if (o !== 2'b01) failed = 1;
#1; #0 if (o !== 2'b01) failed = 1;

#1;
if (failed)
$display("FAILED");
else
$display("PASSED");
end

endmodule
1 change: 1 addition & 0 deletions ivtest/regress-vvp.list
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Expand Up @@ -63,6 +63,7 @@ br_gh1163 vvp_tests/br_gh1163.json
br_gh1180a vvp_tests/br_gh1180a.json
br_gh1180b vvp_tests/br_gh1180b.json
br_gh1181 vvp_tests/br_gh1181.json
br_gh1184 vvp_tests/br_gh1184.json
ca_time_real` vvp_tests/ca_time_real.json
case1 vvp_tests/case1.json
case2 vvp_tests/case2.json
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6 changes: 6 additions & 0 deletions ivtest/vvp_tests/br_gh1184.json
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{
"type" : "EF",
"source" : "br_gh1184.v",
"gold" : "br_gh1184",
"iverilog-args" : [ "-gspecify" ]
}

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