Setup asv for historical benchmarking

.gitignore

@@ -188,3 +188,9 @@ requirements-dev.lock
 
 # Ruff
 .ruff_cache
+
+# asv
+benchmarks/results
+benchmarks/html
+benchmarks/env
+benchmarks/tqecd

benchmarks/asv.conf.json

@@ -0,0 +1,18 @@
+{
+    "version": 1,
+    "project": "tqecd",
+    "project_url": "https://tqec.github.io/tqecd/",
+    "repo": "..",
+    "build_command": [
+        "python -m build --wheel -o {build_cache_dir} {build_dir}"
+    ],
+    "branches": ["main"],
+    "dvcs": "git",
+    "environment_type": "virtualenv",
+    "show_commit_url": "http://github.com/tqec/tqecd/commit/",
+    "benchmark_dir": "benchmarks",
+    "env_dir": "env",
+    "results_dir": "results",
+    "html_dir": "html",
+    "build_cache_size": 2
+}

benchmarks/benchmarks/annotate_detectors_automatically.py

@@ -0,0 +1,44 @@
+from pathlib import Path
+
+import stim
+
+from tqecd.construction import annotate_detectors_automatically
+
+HERE = Path(__file__).parent
+MAIN_BENCHMARKS_FOLDER = HERE.parent
+WORKLOADS_FOLDER = MAIN_BENCHMARKS_FOLDER / "workloads"
+
+BENCHMARK_SITUATIONS: dict[str, list[Path]] = {
+    folder.name: list(file for file in folder.iterdir())
+    for folder in WORKLOADS_FOLDER.iterdir()
+    if folder.is_dir()
+}
+ALL_BENCHMARK_FILES: list[Path] = sum(BENCHMARK_SITUATIONS.values(), start=[])
+
+
+class BaseAutomaticDetectorAnnotation:
+    params = ALL_BENCHMARK_FILES
+
+    def setup(self, path: Path):
+        self.circuit = stim.Circuit.from_file(path)
+
+    def teardown(self, _: Path):
+        del self.circuit
+
+    def _annotate(self) -> None:
+        annotate_detectors_automatically(self.circuit)
+
+
+class TimeAutomaticDetectorAnnotation(BaseAutomaticDetectorAnnotation):
+    def time_annotate_detectors_automatically(self, _: Path):
+        self._annotate()
+
+
+class MemAutomaticDetectorAnnotation(BaseAutomaticDetectorAnnotation):
+    def mem_annotate_detectors_automatically(self, _: Path):
+        self._annotate()
+
+
+class PeakMemAutomaticDetectorAnnotation(BaseAutomaticDetectorAnnotation):
+    def peakmem_annotate_detectors_automatically(self, _: Path):
+        self._annotate()

benchmarks/workloads/generate.py

@@ -0,0 +1,49 @@
+from pathlib import Path
+
+import stim
+
+HERE = Path(__file__).parent
+CODE_TASKS = [
+    "repetition_code:memory",
+    "surface_code:rotated_memory_x",
+    "surface_code:rotated_memory_z",
+    "surface_code:unrotated_memory_x",
+    "surface_code:unrotated_memory_z",
+    "color_code:memory_xyz",
+]
+DISTANCES = [3, 5, 7, 9]
+
+
+def remove_annotations(circuit: stim.Circuit) -> stim.Circuit:
+    ret = stim.Circuit()
+    for inst in circuit:
+        if isinstance(inst, stim.CircuitRepeatBlock):
+            ret.append(
+                stim.CircuitRepeatBlock(
+                    inst.repeat_count, remove_annotations(inst.body_copy())
+                )
+            )
+        elif inst.name not in ["DETECTOR", "OBSERVABLE_INCLUDE", "SHIFT_COORDS"]:
+            ret.append(inst)
+    return ret
+
+
+def main() -> None:
+    for task in CODE_TASKS:
+        folder = HERE / task.replace(":", "_")
+        if not folder.exists():
+            folder.mkdir(parents=True)
+
+        for distance in DISTANCES:
+            circuit = stim.Circuit.generated(task, distance=distance, rounds=distance)
+            circuit = remove_annotations(circuit)
+            with open(folder / f"{distance}.stim", "w") as f:
+                f.write(str(circuit))
+    print(
+        f"Circuit generated in {HERE}. Hand-modifications are still needed "
+        "(replacement of combined instructions by split M and R instructions)."
+    )
+
+
+if __name__ == "__main__":
+    main()

benchmarks/workloads/surface_code_rotated_memory_x/3.stim

@@ -0,0 +1,52 @@
+QUBIT_COORDS(1, 1) 1
+QUBIT_COORDS(2, 0) 2
+QUBIT_COORDS(3, 1) 3
+QUBIT_COORDS(5, 1) 5
+QUBIT_COORDS(1, 3) 8
+QUBIT_COORDS(2, 2) 9
+QUBIT_COORDS(3, 3) 10
+QUBIT_COORDS(4, 2) 11
+QUBIT_COORDS(5, 3) 12
+QUBIT_COORDS(6, 2) 13
+QUBIT_COORDS(0, 4) 14
+QUBIT_COORDS(1, 5) 15
+QUBIT_COORDS(2, 4) 16
+QUBIT_COORDS(3, 5) 17
+QUBIT_COORDS(4, 4) 18
+QUBIT_COORDS(5, 5) 19
+QUBIT_COORDS(4, 6) 25
+RX 1 3 5 8 10 12 15 17 19
+R 2 9 11 13 14 16 18 25
+TICK
+H 2 11 16 25
+TICK
+CX 2 3 16 17 11 12 15 14 10 9 19 18
+TICK
+CX 2 1 16 15 11 10 8 14 3 9 12 18
+TICK
+CX 16 10 11 5 25 19 8 9 17 18 12 13
+TICK
+CX 16 8 11 3 25 17 1 9 10 18 5 13
+TICK
+H 2 11 16 25
+TICK
+M 2 9 11 13 14 16 18 25
+REPEAT 2 {
+    TICK
+    R 2 9 11 13 14 16 18 25
+    TICK
+    H 2 11 16 25
+    TICK
+    CX 2 3 16 17 11 12 15 14 10 9 19 18
+    TICK
+    CX 2 1 16 15 11 10 8 14 3 9 12 18
+    TICK
+    CX 16 10 11 5 25 19 8 9 17 18 12 13
+    TICK
+    CX 16 8 11 3 25 17 1 9 10 18 5 13
+    TICK
+    H 2 11 16 25
+    TICK
+    M 2 9 11 13 14 16 18 25
+}
+MX 1 3 5 8 10 12 15 17 19

benchmarks/workloads/surface_code_rotated_memory_x/5.stim

@@ -0,0 +1,84 @@
+QUBIT_COORDS(1, 1) 1
+QUBIT_COORDS(2, 0) 2
+QUBIT_COORDS(3, 1) 3
+QUBIT_COORDS(5, 1) 5
+QUBIT_COORDS(6, 0) 6
+QUBIT_COORDS(7, 1) 7
+QUBIT_COORDS(9, 1) 9
+QUBIT_COORDS(1, 3) 12
+QUBIT_COORDS(2, 2) 13
+QUBIT_COORDS(3, 3) 14
+QUBIT_COORDS(4, 2) 15
+QUBIT_COORDS(5, 3) 16
+QUBIT_COORDS(6, 2) 17
+QUBIT_COORDS(7, 3) 18
+QUBIT_COORDS(8, 2) 19
+QUBIT_COORDS(9, 3) 20
+QUBIT_COORDS(10, 2) 21
+QUBIT_COORDS(0, 4) 22
+QUBIT_COORDS(1, 5) 23
+QUBIT_COORDS(2, 4) 24
+QUBIT_COORDS(3, 5) 25
+QUBIT_COORDS(4, 4) 26
+QUBIT_COORDS(5, 5) 27
+QUBIT_COORDS(6, 4) 28
+QUBIT_COORDS(7, 5) 29
+QUBIT_COORDS(8, 4) 30
+QUBIT_COORDS(9, 5) 31
+QUBIT_COORDS(1, 7) 34
+QUBIT_COORDS(2, 6) 35
+QUBIT_COORDS(3, 7) 36
+QUBIT_COORDS(4, 6) 37
+QUBIT_COORDS(5, 7) 38
+QUBIT_COORDS(6, 6) 39
+QUBIT_COORDS(7, 7) 40
+QUBIT_COORDS(8, 6) 41
+QUBIT_COORDS(9, 7) 42
+QUBIT_COORDS(10, 6) 43
+QUBIT_COORDS(0, 8) 44
+QUBIT_COORDS(1, 9) 45
+QUBIT_COORDS(2, 8) 46
+QUBIT_COORDS(3, 9) 47
+QUBIT_COORDS(4, 8) 48
+QUBIT_COORDS(5, 9) 49
+QUBIT_COORDS(6, 8) 50
+QUBIT_COORDS(7, 9) 51
+QUBIT_COORDS(8, 8) 52
+QUBIT_COORDS(9, 9) 53
+QUBIT_COORDS(4, 10) 59
+QUBIT_COORDS(8, 10) 63
+RX 1 3 5 7 9 12 14 16 18 20 23 25 27 29 31 34 36 38 40 42 45 47 49 51 53
+R 2 6 13 15 17 19 21 22 24 26 28 30 35 37 39 41 43 44 46 48 50 52 59 63
+TICK
+H 2 6 15 19 24 28 37 41 46 50 59 63
+TICK
+CX 2 3 24 25 46 47 15 16 37 38 6 7 28 29 50 51 19 20 41 42 23 22 45 44 14 13 36 35 27 26 49 48 18 17 40 39 31 30 53 52
+TICK
+CX 2 1 24 23 46 45 15 14 37 36 6 5 28 27 50 49 19 18 41 40 12 22 34 44 3 13 25 35 16 26 38 48 7 17 29 39 20 30 42 52
+TICK
+CX 24 14 46 36 15 5 37 27 59 49 28 18 50 40 19 9 41 31 63 53 12 13 34 35 25 26 47 48 16 17 38 39 29 30 51 52 20 21 42 43
+TICK
+CX 24 12 46 34 15 3 37 25 59 47 28 16 50 38 19 7 41 29 63 51 1 13 23 35 14 26 36 48 5 17 27 39 18 30 40 52 9 21 31 43
+TICK
+H 2 6 15 19 24 28 37 41 46 50 59 63
+TICK
+M 2 6 13 15 17 19 21 22 24 26 28 30 35 37 39 41 43 44 46 48 50 52 59 63
+REPEAT 4 {
+    TICK
+    R 2 6 13 15 17 19 21 22 24 26 28 30 35 37 39 41 43 44 46 48 50 52 59 63
+    TICK
+    H 2 6 15 19 24 28 37 41 46 50 59 63
+    TICK
+    CX 2 3 24 25 46 47 15 16 37 38 6 7 28 29 50 51 19 20 41 42 23 22 45 44 14 13 36 35 27 26 49 48 18 17 40 39 31 30 53 52
+    TICK
+    CX 2 1 24 23 46 45 15 14 37 36 6 5 28 27 50 49 19 18 41 40 12 22 34 44 3 13 25 35 16 26 38 48 7 17 29 39 20 30 42 52
+    TICK
+    CX 24 14 46 36 15 5 37 27 59 49 28 18 50 40 19 9 41 31 63 53 12 13 34 35 25 26 47 48 16 17 38 39 29 30 51 52 20 21 42 43
+    TICK
+    CX 24 12 46 34 15 3 37 25 59 47 28 16 50 38 19 7 41 29 63 51 1 13 23 35 14 26 36 48 5 17 27 39 18 30 40 52 9 21 31 43
+    TICK
+    H 2 6 15 19 24 28 37 41 46 50 59 63
+    TICK
+    M 2 6 13 15 17 19 21 22 24 26 28 30 35 37 39 41 43 44 46 48 50 52 59 63
+}
+MX 1 3 5 7 9 12 14 16 18 20 23 25 27 29 31 34 36 38 40 42 45 47 49 51 53

benchmarks/workloads/surface_code_rotated_memory_x/7.stim

@@ -0,0 +1,132 @@
+QUBIT_COORDS(1, 1) 1
+QUBIT_COORDS(2, 0) 2
+QUBIT_COORDS(3, 1) 3
+QUBIT_COORDS(5, 1) 5
+QUBIT_COORDS(6, 0) 6
+QUBIT_COORDS(7, 1) 7
+QUBIT_COORDS(9, 1) 9
+QUBIT_COORDS(10, 0) 10
+QUBIT_COORDS(11, 1) 11
+QUBIT_COORDS(13, 1) 13
+QUBIT_COORDS(1, 3) 16
+QUBIT_COORDS(2, 2) 17
+QUBIT_COORDS(3, 3) 18
+QUBIT_COORDS(4, 2) 19
+QUBIT_COORDS(5, 3) 20
+QUBIT_COORDS(6, 2) 21
+QUBIT_COORDS(7, 3) 22
+QUBIT_COORDS(8, 2) 23
+QUBIT_COORDS(9, 3) 24
+QUBIT_COORDS(10, 2) 25
+QUBIT_COORDS(11, 3) 26
+QUBIT_COORDS(12, 2) 27
+QUBIT_COORDS(13, 3) 28
+QUBIT_COORDS(14, 2) 29
+QUBIT_COORDS(0, 4) 30
+QUBIT_COORDS(1, 5) 31
+QUBIT_COORDS(2, 4) 32
+QUBIT_COORDS(3, 5) 33
+QUBIT_COORDS(4, 4) 34
+QUBIT_COORDS(5, 5) 35
+QUBIT_COORDS(6, 4) 36
+QUBIT_COORDS(7, 5) 37
+QUBIT_COORDS(8, 4) 38
+QUBIT_COORDS(9, 5) 39
+QUBIT_COORDS(10, 4) 40
+QUBIT_COORDS(11, 5) 41
+QUBIT_COORDS(12, 4) 42
+QUBIT_COORDS(13, 5) 43
+QUBIT_COORDS(1, 7) 46
+QUBIT_COORDS(2, 6) 47
+QUBIT_COORDS(3, 7) 48
+QUBIT_COORDS(4, 6) 49
+QUBIT_COORDS(5, 7) 50
+QUBIT_COORDS(6, 6) 51
+QUBIT_COORDS(7, 7) 52
+QUBIT_COORDS(8, 6) 53
+QUBIT_COORDS(9, 7) 54
+QUBIT_COORDS(10, 6) 55
+QUBIT_COORDS(11, 7) 56
+QUBIT_COORDS(12, 6) 57
+QUBIT_COORDS(13, 7) 58
+QUBIT_COORDS(14, 6) 59
+QUBIT_COORDS(0, 8) 60
+QUBIT_COORDS(1, 9) 61
+QUBIT_COORDS(2, 8) 62
+QUBIT_COORDS(3, 9) 63
+QUBIT_COORDS(4, 8) 64
+QUBIT_COORDS(5, 9) 65
+QUBIT_COORDS(6, 8) 66
+QUBIT_COORDS(7, 9) 67
+QUBIT_COORDS(8, 8) 68
+QUBIT_COORDS(9, 9) 69
+QUBIT_COORDS(10, 8) 70
+QUBIT_COORDS(11, 9) 71
+QUBIT_COORDS(12, 8) 72
+QUBIT_COORDS(13, 9) 73
+QUBIT_COORDS(1, 11) 76
+QUBIT_COORDS(2, 10) 77
+QUBIT_COORDS(3, 11) 78
+QUBIT_COORDS(4, 10) 79
+QUBIT_COORDS(5, 11) 80
+QUBIT_COORDS(6, 10) 81
+QUBIT_COORDS(7, 11) 82
+QUBIT_COORDS(8, 10) 83
+QUBIT_COORDS(9, 11) 84
+QUBIT_COORDS(10, 10) 85
+QUBIT_COORDS(11, 11) 86
+QUBIT_COORDS(12, 10) 87
+QUBIT_COORDS(13, 11) 88
+QUBIT_COORDS(14, 10) 89
+QUBIT_COORDS(0, 12) 90
+QUBIT_COORDS(1, 13) 91
+QUBIT_COORDS(2, 12) 92
+QUBIT_COORDS(3, 13) 93
+QUBIT_COORDS(4, 12) 94
+QUBIT_COORDS(5, 13) 95
+QUBIT_COORDS(6, 12) 96
+QUBIT_COORDS(7, 13) 97
+QUBIT_COORDS(8, 12) 98
+QUBIT_COORDS(9, 13) 99
+QUBIT_COORDS(10, 12) 100
+QUBIT_COORDS(11, 13) 101
+QUBIT_COORDS(12, 12) 102
+QUBIT_COORDS(13, 13) 103
+QUBIT_COORDS(4, 14) 109
+QUBIT_COORDS(8, 14) 113
+QUBIT_COORDS(12, 14) 117
+RX 1 3 5 7 9 11 13 16 18 20 22 24 26 28 31 33 35 37 39 41 43 46 48 50 52 54 56 58 61 63 65 67 69 71 73 76 78 80 82 84 86 88 91 93 95 97 99 101 103
+R 2 6 10 17 19 21 23 25 27 29 30 32 34 36 38 40 42 47 49 51 53 55 57 59 60 62 64 66 68 70 72 77 79 81 83 85 87 89 90 92 94 96 98 100 102 109 113 117
+TICK
+H 2 6 10 19 23 27 32 36 40 49 53 57 62 66 70 79 83 87 92 96 100 109 113 117
+TICK
+CX 2 3 32 33 62 63 92 93 19 20 49 50 79 80 6 7 36 37 66 67 96 97 23 24 53 54 83 84 10 11 40 41 70 71 100 101 27 28 57 58 87 88 31 30 61 60 91 90 18 17 48 47 78 77 35 34 65 64 95 94 22 21 52 51 82 81 39 38 69 68 99 98 26 25 56 55 86 85 43 42 73 72 103 102
+TICK
+CX 2 1 32 31 62 61 92 91 19 18 49 48 79 78 6 5 36 35 66 65 96 95 23 22 53 52 83 82 10 9 40 39 70 69 100 99 27 26 57 56 87 86 16 30 46 60 76 90 3 17 33 47 63 77 20 34 50 64 80 94 7 21 37 51 67 81 24 38 54 68 84 98 11 25 41 55 71 85 28 42 58 72 88 102
+TICK
+CX 32 18 62 48 92 78 19 5 49 35 79 65 109 95 36 22 66 52 96 82 23 9 53 39 83 69 113 99 40 26 70 56 100 86 27 13 57 43 87 73 117 103 16 17 46 47 76 77 33 34 63 64 93 94 20 21 50 51 80 81 37 38 67 68 97 98 24 25 54 55 84 85 41 42 71 72 101 102 28 29 58 59 88 89
+TICK
+CX 32 16 62 46 92 76 19 3 49 33 79 63 109 93 36 20 66 50 96 80 23 7 53 37 83 67 113 97 40 24 70 54 100 84 27 11 57 41 87 71 117 101 1 17 31 47 61 77 18 34 48 64 78 94 5 21 35 51 65 81 22 38 52 68 82 98 9 25 39 55 69 85 26 42 56 72 86 102 13 29 43 59 73 89
+TICK
+H 2 6 10 19 23 27 32 36 40 49 53 57 62 66 70 79 83 87 92 96 100 109 113 117
+TICK
+M 2 6 10 17 19 21 23 25 27 29 30 32 34 36 38 40 42 47 49 51 53 55 57 59 60 62 64 66 68 70 72 77 79 81 83 85 87 89 90 92 94 96 98 100 102 109 113 117
+REPEAT 6 {
+    TICK
+    R 2 6 10 17 19 21 23 25 27 29 30 32 34 36 38 40 42 47 49 51 53 55 57 59 60 62 64 66 68 70 72 77 79 81 83 85 87 89 90 92 94 96 98 100 102 109 113 117
+    TICK
+    H 2 6 10 19 23 27 32 36 40 49 53 57 62 66 70 79 83 87 92 96 100 109 113 117
+    TICK
+    CX 2 3 32 33 62 63 92 93 19 20 49 50 79 80 6 7 36 37 66 67 96 97 23 24 53 54 83 84 10 11 40 41 70 71 100 101 27 28 57 58 87 88 31 30 61 60 91 90 18 17 48 47 78 77 35 34 65 64 95 94 22 21 52 51 82 81 39 38 69 68 99 98 26 25 56 55 86 85 43 42 73 72 103 102
+    TICK
+    CX 2 1 32 31 62 61 92 91 19 18 49 48 79 78 6 5 36 35 66 65 96 95 23 22 53 52 83 82 10 9 40 39 70 69 100 99 27 26 57 56 87 86 16 30 46 60 76 90 3 17 33 47 63 77 20 34 50 64 80 94 7 21 37 51 67 81 24 38 54 68 84 98 11 25 41 55 71 85 28 42 58 72 88 102
+    TICK
+    CX 32 18 62 48 92 78 19 5 49 35 79 65 109 95 36 22 66 52 96 82 23 9 53 39 83 69 113 99 40 26 70 56 100 86 27 13 57 43 87 73 117 103 16 17 46 47 76 77 33 34 63 64 93 94 20 21 50 51 80 81 37 38 67 68 97 98 24 25 54 55 84 85 41 42 71 72 101 102 28 29 58 59 88 89
+    TICK
+    CX 32 16 62 46 92 76 19 3 49 33 79 63 109 93 36 20 66 50 96 80 23 7 53 37 83 67 113 97 40 24 70 54 100 84 27 11 57 41 87 71 117 101 1 17 31 47 61 77 18 34 48 64 78 94 5 21 35 51 65 81 22 38 52 68 82 98 9 25 39 55 69 85 26 42 56 72 86 102 13 29 43 59 73 89
+    TICK
+    H 2 6 10 19 23 27 32 36 40 49 53 57 62 66 70 79 83 87 92 96 100 109 113 117
+    TICK
+    M 2 6 10 17 19 21 23 25 27 29 30 32 34 36 38 40 42 47 49 51 53 55 57 59 60 62 64 66 68 70 72 77 79 81 83 85 87 89 90 92 94 96 98 100 102 109 113 117
+}
+MX 1 3 5 7 9 11 13 16 18 20 22 24 26 28 31 33 35 37 39 41 43 46 48 50 52 54 56 58 61 63 65 67 69 71 73 76 78 80 82 84 86 88 91 93 95 97 99 101 103