trinathkella
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Languages – C, C++, Python, Shell Scripting, TCL
HDLs – Verilog, SystemVerilog
Tools & Technologies – Vivado, Questa Sim, Xilinx SDK, Linux
Methodologies – UVM (Universal Verification Methodology)
Floating Point Unit using IEEE 754 (32-bit)
Designed and implemented arithmetic operations (add, sub, mul, div) on Zynq-7000 using Vivado and Xilinx SDK.
PRNG
Designed a 32-bit PRNG with different rulesets of 1D Cellular Automata. In addition, integrated the LFSR.
Digital Designs from basic circuits to complex circuits designed using HDL-VERILOG
Verilog 1
Six Months internship in functional level testing on railway signaling systems
Step-by-step guide to install AMD Vivado Design Suite on Ubuntu.
32-bit Floating Point Unit (FPU) designed and implemented as part of the CDAC specialization project. Supports IEEE-754 standard
Verilog
The APB (Advanced Peripheral Bus) protocol, developed by ARM, is used to facilitate communication between various components within a System on Chip (SoC).
SystemVerilog
