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Accelerometer sequencer state machine fix and improved response time #3

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Accelerometer sequencer state machine fix and improved response time #3

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07798ec
accelerometer_test: added compile script
rthomp10 Jun 23, 2024
9dc098a
accelerometer_test: top testbench ports fixed
rthomp10 Jun 23, 2024
8eaace0
accelerometer_test: set spi master div_coef to 200
rthomp10 Jun 24, 2024
de547b4
accelerometer_test: led assignment made after spi read
rthomp10 Jun 24, 2024
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4 changes: 4 additions & 0 deletions demo01_accelerometer_test/compile.do
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Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
vlog sequencer.v
vlog spi_master.v
vlog top.v
vlog top_tb.v
41 changes: 25 additions & 16 deletions demo01_accelerometer_test/sequencer.v
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,8 @@ module sequencer (

output reg spi_request,
input wire spi_ready,

input wire spi_csn,

output reg [7:0] led_out
);

Expand All @@ -22,9 +23,10 @@ localparam
STATE_Init2 = 4'd6,
STATE_Init2_Wait = 4'd7,
STATE_Read = 4'd8,
STATE_Read_Wait = 4'd9,
STATE_LEDout = 4'd10;

STATE_LEDout_Wait = 4'd9,
STATE_Read_Wait = 4'd10,
STATE_LEDout = 4'd11;

reg [3:0] state;

reg signed [7:0] saved_acc;
Expand Down Expand Up @@ -108,26 +110,33 @@ always @(posedge clk_in or negedge nrst)
end

// 5. Read OUT_X_H (Addr 0x29)
STATE_Read_Wait: begin
if (spi_ready) begin
state <= STATE_Read;
end
spi_request <= 1'b0;
end

STATE_Read: begin
state <= STATE_Read_Wait;
state <= STATE_LEDout_Wait;

spi_request <= 1'b1;
spi_nbits <= 6'd23;
spi_mosi_data <= 31'b11101000_00000000_00000000;
end
STATE_Read_Wait: begin
if (spi_ready) begin
state <= STATE_LEDout;

STATE_LEDout_Wait: begin
if (spi_request == 0 && spi_csn == 1) begin
state <= STATE_LEDout;
saved_acc <= spi_miso_data[7:0];
end
spi_request <= 1'b0;
end
end
spi_request <= 1'b0;
end

// 6. Set LED output according to accelerometer value
STATE_LEDout: begin
state <= STATE_Read;
state <= STATE_Read_Wait;

led_out <= 1 << ((saved_acc + 8'Sb1000_0000) >> 5);
end
endcase
Expand Down
15 changes: 10 additions & 5 deletions demo01_accelerometer_test/top.v
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,9 @@ wire [5:0] spi_nbits;
wire spi_request;
wire spi_ready;

wire spi_csn;
assign SEN_CS = spi_csn;

sequencer U1 (
.clk_in(CLK12M),
.nrst(nrst),
Expand All @@ -30,19 +33,21 @@ sequencer U1 (

.spi_request(spi_request),
.spi_ready(spi_ready),

.spi_csn(spi_csn),

.led_out(LED)
);

spi_master U2 (

spi_master #(.div_coef(32'd200))
U2 (
.clk_in(CLK12M),
.nrst(nrst),

.spi_sck(SEN_SPC),
.spi_mosi(SEN_SDI),
.spi_miso(SEN_SDO),
.spi_csn(SEN_CS),
.spi_csn(spi_csn),

.mosi_data(spi_mosi_data),
.miso_data(spi_miso_data),
.nbits(spi_nbits),
Expand Down
16 changes: 7 additions & 9 deletions demo01_accelerometer_test/top_tb.v
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Original file line number Diff line number Diff line change
Expand Up @@ -28,15 +28,13 @@ spi_master #(.div_coef(32'd100))
DUT2 (
.clk_in(CLK),
.nrst(NRESET),
.spi_clk(spi_clk),
.spi_sdo(spi_sdo),
.spi_sdi(spi_sdi),
.spi_cs(spi_cs),

.data_in(data_in),
.data_out(data_out),
.n_bits(n_bits), // n_bits==0 -> 1 bit transfer

.spi_sck(spi_clk),
.spi_mosi(spi_sdo),
.spi_miso(spi_sdi),
.spi_csn(spi_cs),
.mosi_data(data_in),
.miso_data(data_out),
.nbits(n_bits),
.request(request),
.ready(ready)
);
Expand Down