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Add missing zephyr,memory-region in STM32 dts & use LINKER_DT_NODE_REGION_NAME in LTDC for ext-sdram #95299

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Add missing zephyr,memory-region in STM32 dts & use LINKER_DT_NODE_REGION_NAME in LTDC for ext-sdram #95299

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179c8e2
dts: arm: st: add zephyr,memory-region on all missing stm32 dts
Sep 1, 2025
0376f2f
display: stm32_ltdc: use LINKER_DT_NODE_REGION_NAME for ext-sdram
Sep 1, 2025
6ad4729
drivers: memc: stm32: removal of sdram1/sdram2/psram sections handling
Sep 1, 2025
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16 changes: 3 additions & 13 deletions drivers/display/display_stm32_ltdc.c
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Expand Up @@ -18,6 +18,7 @@
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/reset.h>
#include <zephyr/linker/devicetree_regions.h>
#include <zephyr/pm/device.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/cache.h>
Expand Down Expand Up @@ -555,19 +556,8 @@ static DEVICE_API(display, stm32_ltdc_display_api) = {
};

#if DT_INST_NODE_HAS_PROP(0, ext_sdram)

#if DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1))
#define FRAME_BUFFER_SECTION __stm32_sdram1_section
#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram2))
#define FRAME_BUFFER_SECTION __stm32_sdram2_section
#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(psram))
#define FRAME_BUFFER_SECTION __stm32_psram_section
#else
#error "LTDC ext-sdram property in device tree does not reference SDRAM1 or SDRAM2 node or PSRAM "\
"node"
#define FRAME_BUFFER_SECTION
#endif /* DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1)) */

#define FRAME_BUFFER_SECTION \
Z_GENERIC_SECTION(LINKER_DT_NODE_REGION_NAME(DT_INST_PHANDLE(0, ext_sdram)))
#else
#define FRAME_BUFFER_SECTION
#endif /* DT_INST_NODE_HAS_PROP(0, ext_sdram) */
Expand Down
2 changes: 0 additions & 2 deletions drivers/memc/CMakeLists.txt
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Expand Up @@ -26,7 +26,5 @@ zephyr_library_sources_ifdef(CONFIG_MEMC_SMARTBOND memc_smartbond_
zephyr_library_sources_ifdef(CONFIG_MEMC_STM32 memc_stm32.c)
zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_NOR_PSRAM memc_stm32_nor_psram.c)
zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_SDRAM memc_stm32_sdram.c)
zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_SDRAM SECTIONS memc_stm32_sdram.ld)

zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM memc_stm32_xspi_psram.c)
zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM SECTIONS memc_stm32_xspi_psram.ld)
29 changes: 0 additions & 29 deletions drivers/memc/memc_stm32_sdram.ld
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This file was deleted.

16 changes: 0 additions & 16 deletions drivers/memc/memc_stm32_xspi_psram.ld
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This file was deleted.

3 changes: 2 additions & 1 deletion dts/arm/st/c0/stm32c0.dtsi
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Expand Up @@ -87,7 +87,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/f0/stm32f0.dtsi
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Expand Up @@ -35,7 +35,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/f1/stm32f1.dtsi
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Expand Up @@ -55,7 +55,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/f2/stm32f2.dtsi
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Expand Up @@ -37,7 +37,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/f3/stm32f3.dtsi
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Expand Up @@ -34,7 +34,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};


Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/f4/stm32f4.dtsi
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Expand Up @@ -55,7 +55,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/g0/stm32g0.dtsi
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Expand Up @@ -54,7 +54,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/g4/stm32g4.dtsi
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Expand Up @@ -53,7 +53,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
2 changes: 2 additions & 0 deletions dts/arm/st/h5/stm32h503Xb.dtsi
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Expand Up @@ -8,7 +8,9 @@

/ {
sram0: memory@20000000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x20000000 DT_SIZE_K(32)>;
zephyr,memory-region = "SRAM0";
};

soc {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/h7/stm32h723.dtsi
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Expand Up @@ -195,7 +195,8 @@
/* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */
sram0: memory@24000000 {
reg = <0x24000000 DT_SIZE_K(320)>;
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

/* D2 domain, AHB SRAM */
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/h7/stm32h742.dtsi
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Expand Up @@ -64,8 +64,9 @@

/* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
sram0: memory@24000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x24000000 DT_SIZE_K(384)>;
zephyr,memory-region = "SRAM0";
};

/* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/h7/stm32h745.dtsi
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Expand Up @@ -91,7 +91,8 @@
/* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
sram0: memory@24000000 {
reg = <0x24000000 DT_SIZE_K(512)>;
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

/* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/h7/stm32h7a3.dtsi
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Expand Up @@ -112,8 +112,9 @@

/* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */
sram0: memory@24000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x24000000 DT_SIZE_K(256)>;
zephyr,memory-region = "SRAM0";
};

/* System data RAM accessible over AXI bus: AXI SRAM2 in CD domain */
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/h7rs/stm32h7rs.dtsi
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Expand Up @@ -50,8 +50,9 @@

/* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */
sram0: memory@24000000 {
compatible = "mmio-sram";
reg = <0x24000000 DT_SIZE_K(128)>;
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

/* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/l0/stm32l0.dtsi
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Expand Up @@ -44,7 +44,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/l1/stm32l1.dtsi
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Expand Up @@ -54,7 +54,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/l4/stm32l4.dtsi
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Expand Up @@ -60,7 +60,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
5 changes: 5 additions & 0 deletions dts/arm/st/l4/stm32l471.dtsi
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Expand Up @@ -7,6 +7,11 @@
#include <st/l4/stm32l4.dtsi>

/ {
sram1: memory@10000000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM1";
};

clocks {
pllsai2: pllsai2 {
#clock-cells = <0>;
Expand Down
4 changes: 4 additions & 0 deletions dts/arm/st/l4/stm32l4p5.dtsi
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Expand Up @@ -17,9 +17,13 @@
reg = <0x20000000 DT_SIZE_K(128)>;
};
sram1: memory@10000000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM1";
reg = <0x10000000 DT_SIZE_K(64)>;
};
sram2: memory@20030000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM2";
reg = <0x20030000 DT_SIZE_K(128)>;
};

Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/l5/stm32l5.dtsi
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Expand Up @@ -67,7 +67,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
6 changes: 4 additions & 2 deletions dts/arm/st/mp1/stm32mp157.dtsi
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Expand Up @@ -31,11 +31,13 @@
};

retram: memory0@0 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x00000000 DT_SIZE_K(64)>;
zephyr,memory-region = "RETRAM";
};
mcusram: memory1@10000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "MCUSRAM";
reg = <0x10000000 DT_SIZE_K(320)>;
};

Expand Down
9 changes: 6 additions & 3 deletions dts/arm/st/mp13/stm32mp13.dtsi
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Expand Up @@ -43,7 +43,8 @@
interrupt-parent = <&gic>;

sysram: memory@2ffe0000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SYSRAM";
reg = <0x2FFE0000 DT_SIZE_K(128)>;
};

Expand Down Expand Up @@ -257,12 +258,14 @@
};

ddr_code: memory@C0000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "DDR_CODE";
reg = <0xC0000000 0x10000000>;
};

ddr_data: memory@D0000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "DDR_DATA";
reg = <0xD0000000 0x10000000>;
};

Expand Down
6 changes: 4 additions & 2 deletions dts/arm/st/mp2/stm32mp2_m33.dtsi
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Expand Up @@ -25,11 +25,13 @@
};

ddr_code: memory0@80100000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "DDR_CODE";
};

ddr_sys: memory1@80a00000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "DDR_SYS";
};

soc {
Expand Down
6 changes: 4 additions & 2 deletions dts/arm/st/n6/stm32n6.dtsi
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Expand Up @@ -39,11 +39,13 @@
};

axisram1: memory@34000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "AXISRAM1";
};

axisram2: memory@34180400 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "AXISRAM2";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/u0/stm32u0.dtsi
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Expand Up @@ -60,7 +60,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/u3/stm32u3.dtsi
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Expand Up @@ -33,7 +33,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
3 changes: 2 additions & 1 deletion dts/arm/st/u5/stm32u5.dtsi
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Expand Up @@ -76,7 +76,8 @@
};

sram0: memory@20000000 {
compatible = "mmio-sram";
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM0";
};

clocks {
Expand Down
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