Added Verilog module for JK flip flop

[092vk]

Fixes #560

Describe the changes you have made in this PR -

1. Added the verilog module for JK flip flop
2. Async reset and preset were handled according to their circuit model

Note: Please check Allow edits from maintainers. if you would like us to assist in the PR.

Summary by CodeRabbit

• New Features
  • Added the ability to generate Verilog hardware descriptions for JK flip-flops directly from the simulator.

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Walkthrough

A static method named moduleVerilog() was added to the JKflipFlop class in the simulator's sequential logic source. This method returns a Verilog module definition string for a JK flip-flop, specifying inputs, outputs, and behavioral logic. No other parts of the class or file were changed.

Changes

File(s)	Change Summary
src/simulator/src/sequential/JKflipFlop.js	Added static method moduleVerilog() returning Verilog code for JK flip-flop

Assessment against linked issues

Objective	Addressed	Explanation
Implement Verilog module for JK Flip Flops (#560)	✅
Implement Verilog module for SR Flip Flops, ALU, D-Latch, ForceGate, LSB, MSB, etc. (#560)	❌	Only JK flip-flop module was implemented; other elements are not addressed.

Assessment against linked issues: Out-of-scope changes

No out-of-scope changes were found.

Warning

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npm error This is an error with npm itself. Please report this error at:
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npm error A complete log of this run can be found in: /.npm/_logs/2025-06-28T12_00_31_397Z-debug-0.log

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📥 Commits

Reviewing files that changed from the base of the PR and between 5cbf463 and 09da9af.

📒 Files selected for processing (1)

• src/simulator/src/sequential/JKflipFlop.js (1 hunks)

🧰 Additional context used

🧠 Learnings (2)

📓 Common learnings

Learnt from: 092vk
PR: CircuitVerse/cv-frontend-vue#591
File: v1/src/simulator/src/sequential/JKflipFlop.js:159-188
Timestamp: 2025-06-10T11:26:38.102Z
Learning: In the CircuitVerse project, Verilog modules for circuit elements like JKflipFlop are designed to be consistent with the circuit simulation design, which means reset and preset signals are implemented synchronously (triggered on clock edge) rather than asynchronously, even when the signals are named as asynchronous reset/preset.

src/simulator/src/sequential/JKflipFlop.js (2)

Learnt from: 092vk
PR: CircuitVerse/cv-frontend-vue#591
File: v1/src/simulator/src/sequential/JKflipFlop.js:159-188
Timestamp: 2025-06-10T11:26:38.102Z
Learning: In the CircuitVerse project, Verilog modules for circuit elements like JKflipFlop are designed to be consistent with the circuit simulation design, which means reset and preset signals are implemented synchronously (triggered on clock edge) rather than asynchronously, even when the signals are named as asynchronous reset/preset.

Learnt from: 092vk
PR: CircuitVerse/cv-frontend-vue#593
File: v1/src/simulator/src/modules/ALU.js:191-192
Timestamp: 2025-06-10T11:55:53.137Z
Learning: The ALU Verilog module in v1/src/simulator/src/modules/ALU.js currently only supports 1-bit processing. Width parameter support will be added in the future for scalability, even though the JavaScript ALU implementation already supports variable bit widths.

🔇 Additional comments (1)

src/simulator/src/sequential/JKflipFlop.js (1)

149-178: LGTM! Verilog implementation is consistent with JavaScript behavior.

The Verilog module correctly implements the JK flip-flop logic and matches the JavaScript simulation behavior. The synchronous reset/preset implementation aligns with CircuitVerse's design philosophy as noted in the retrieved learnings.

A few minor observations:

• The q <= q assignment on line 168 is redundant in Verilog (registers retain values by default), but it's not incorrect and may improve readability
• The preset logic only activates when reset is asserted, which is consistent with the JavaScript implementation

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[092vk]

@niladrix719 codeclimate issues are not related to my changes....

[coderabbitai]

Actionable comments posted: 1

📜 Review details

Configuration used: CodeRabbit UI
Review profile: CHILL
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📥 Commits

Reviewing files that changed from the base of the PR and between f64c366 and 5cbf463.

📒 Files selected for processing (1)

• v1/src/simulator/src/sequential/JKflipFlop.js (1 hunks)

[niladrix719]

lgtm