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Makes the ALU instructions 16 bit!! #13

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Merged
IntegralPilot merged 2 commits into from
Apr 28, 2025
Merged

Makes the ALU instructions 16 bit!! #13

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483f018
Makes the ALU instructions 16 bit!!
aellul27 Apr 28, 2025
8e820bf
Change ALU op type
aellul27 Apr 28, 2025
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24 changes: 12 additions & 12 deletions GammaALU.vhdl
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ entity GammaALU is
clk: in std_logic; -- Clock signal.
a : in std_logic_vector(31 downto 0); -- Operand A.
b : in std_logic_vector(31 downto 0); -- Operand B.
op : in std_logic_vector(3 downto 0); -- Operation code.
op : in unsigned(15 downto 0); -- Operation code.
result : out std_logic_vector(31 downto 0); -- Result of the operation.
reset : in std_logic; -- Active high reset.
enable: in std_logic -- Active high enable signal.
Expand All @@ -21,50 +21,50 @@ begin
if reset = '1' then
result <= (others => '0');
elsif rising_edge(clk) and enable = '1' then
case op is
when "0000" => -- ADD
case to_integer(op) is
when 0 => -- ADD
result <= std_logic_vector(signed(a) + signed(b));
when "0001" => -- SUB
when 1 => -- SUB
result <= std_logic_vector(signed(a) - signed(b));
when "0010" => -- MUL
when 2 => -- MUL
result <= std_logic_vector(resize(signed(a) * signed(b), 32)); -- Resize to 32 bits
when "0011" => -- DIV
when 3 => -- DIV
if b /= "00000000000000000000000000000000" then
result <= std_logic_vector(signed(a) / signed(b));
else
result <= (others => '0'); -- Handle division by zero
end if;
when "0100" => -- equal
when 4 => -- equal
if a = b then
result <= std_logic_vector(to_signed(1, 32));
else
result <= std_logic_vector(to_signed(0, 32));
end if;
when "0101" => -- inequality
when 5 => -- inequality
if a /= b then
result <= std_logic_vector(to_signed(1, 32));
else
result <= std_logic_vector(to_signed(0, 32));
end if;
when "0110" => -- greater than
when 6 => -- greater than
if a > b then
result <= std_logic_vector(to_signed(1, 32));
else
result <= std_logic_vector(to_signed(0, 32));
end if;
when "0111" => -- less than
when 7 => -- less than
if a < b then
result <= std_logic_vector(to_signed(1, 32));
else
result <= std_logic_vector(to_signed(0, 32));
end if;
when "1000" => -- greater than or equal to
when 8 => -- greater than or equal to
if a >= b then
result <= std_logic_vector(to_signed(1, 32));
else
result <= std_logic_vector(to_signed(0, 32));
end if;
when "1001" => -- less than or equal to
when 9 => -- less than or equal to
if a <= b then
result <= std_logic_vector(to_signed(1, 32));
else
Expand Down
26 changes: 13 additions & 13 deletions GammaCPU.vhdl
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Expand Up @@ -31,7 +31,7 @@ architecture Behavioral of GammaCPU is
port(
a : in std_logic_vector(31 downto 0); -- Operand A.
b : in std_logic_vector(31 downto 0); -- Operand B.
op : in std_logic_vector(3 downto 0); -- Operation code.
op : in unsigned(15 downto 0); -- Operation code.
result : out std_logic_vector(31 downto 0); -- Result of the operation.
reset : in std_logic; -- Active high reset.
enable : in std_logic; -- Active high to perform the operation.
Expand All @@ -58,7 +58,7 @@ architecture Behavioral of GammaCPU is
signal alu_result : std_logic_vector(31 downto 0) := (others => '0');

-- ALU inputs and outputs
signal alu_op : std_logic_vector(3 downto 0);
signal alu_op : unsigned(15 downto 0);
signal alu_a, alu_b : std_logic_vector(31 downto 0);
signal alu_enable : std_logic;

Expand Down Expand Up @@ -125,49 +125,49 @@ begin
state <= StackOperation;

when x"6A" => -- i32.add
alu_op <= "0000"; -- ADD
alu_op <= to_unsigned(0, 16); -- ADD
state <= Execute;

when x"6B" => -- i32.sub
alu_op <= "0001"; -- SUB
alu_op <= to_unsigned(1, 16); -- SUB
state <= Execute;

when x"6C" => -- i32.mul
alu_op <= "0010"; -- MUL
alu_op <= to_unsigned(2, 16); -- MUL
state <= Execute;

when x"6D" => -- i32.div_s
alu_op <= "0011"; -- DIV
alu_op <= to_unsigned(3, 16); -- DIV
state <= Execute;

-- Comparisions
when x"45" => -- i32.eqz
alu_op <= "0100"; -- Equal to zero
alu_op <= to_unsigned(4, 16); -- Equal to zero
only_first_stack <= '1';
state <= Execute;

when x"46" => -- i32.eq
alu_op <= "0100"; -- Equal
alu_op <= to_unsigned(5, 16); -- Equal
state <= Execute;

when x"47" => -- i32.ne
alu_op <= "0101"; -- Not Equal
alu_op <= to_unsigned(6, 16); -- Not Equal
state <= Execute;

when x"4b" => -- i32.gt_s
alu_op <= "0110"; -- Greater than
alu_op <= to_unsigned(7, 16); -- Greater than
state <= Execute;

when x"48" => -- i32.lt_s
alu_op <= "0111"; -- Less than
alu_op <= to_unsigned(8, 16); -- Less than
state <= Execute;

when x"4e" => -- i32.ge_s
alu_op <= "1000"; -- Greater than or equal
alu_op <= to_unsigned(9, 16); -- Greater than or equal
state <= Execute;

when x"4C" => -- i32.le_s
alu_op <= "1001"; -- Less than or equal
alu_op <= to_unsigned(10, 16); -- Less than or equal
state <= Execute;

when others =>
Expand Down
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