Skip to content

Update all linker.cmd files#114

Merged
nsaulnier-ti merged 3 commits intomainfrom
a0226750_update_linkers
Mar 5, 2026
Merged

Update all linker.cmd files#114
nsaulnier-ti merged 3 commits intomainfrom
a0226750_update_linkers

Conversation

@nsaulnier-ti
Copy link
Collaborator

@nsaulnier-ti nsaulnier-ti commented Feb 25, 2026 •
edited by qodo-code-review bot
Loading

User description

Fixes #83:

  • Update AM263px to AM263Px (both filenames & inside the files)
  • Update linker.cmd file memory allocations to use the label pattern of [core]_[memory]
    Additional bugfixes:
  • Fix incorrect linker.cmd files in LCD_interface & multicore_scheduler projects

PR Type

Bug fix

Description

  • Standardized linker memory label naming across all PRU firmware projects to follow the [core]_[memory] pattern

  • Corrected instruction RAM labels for TX_PRU and RTU cores with accurate memory sizes (TX_PRU: 6 KB, RTU: 8 KB, PRU: 12 KB)

  • Fixed data memory allocations to match proper core/slice assignments (e.g., PRU0_DMEM_0, PRU1_DMEM_1, RTU0_DMEM_0, RTU1_DMEM_1, TX_PRU0_DMEM_0, TX_PRU1_DMEM_1)

  • Updated control register labels to correctly reference their respective cores (e.g., TM_CFG_PRU0, PRU0_CTRL)

  • Fixed incorrect linker.cmd files in LCD_interface and multicore_scheduler projects

  • Updated include path references from include/PROCESSOR/pru_intc.h to source/include/c_code/PROCESSOR/pru_intc.h

  • Applied corrections across multiple device variants (AM243x, AM64x, AM261x, AM263x, AM62x) and project types (examples, academy labs, source templates)

Diagram Walkthrough

flowchart LR
  A["Linker.cmd Files<br/>with Incorrect Labels"] -->|"Rename IMEM Labels"| B["TX_PRU_IMEM<br/>RTU_IMEM<br/>PRU_IMEM"]
  A -->|"Fix DMEM Allocations"| C["Correct Core/Slice<br/>Assignments"]
  B --> D["Updated Linker Files<br/>with Standard Pattern"]
  C --> D
  A -->|"Update Control Regs"| E["TM_CFG_[core]<br/>[core]_CTRL"]
  E --> D
Loading

File Walkthrough
Relevant files
Bug fix
66 files
linker.cmd
TX_PRU1 linker memory allocation corrections                         

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Updated instruction RAM label from PRU_IMEM to TX_PRU_IMEM with
    corrected size (6 KB instead of 12 KB)
  • Corrected data memory allocations to use proper core/slice naming:
    PRU1_DMEM_1, RTU1_DMEM_1, TX_PRU1_DMEM_1
  • Updated control register labels to match TX_PRU1 core: TM_CFG_TX_PRU1,
    TX_PRU1_CTRL
  • Updated include path reference from include/PROCESSOR/pru_intc.h to
    source/include/c_code/PROCESSOR/pru_intc.h
  • Updated all section allocations to use TX_PRU_IMEM and TX_PRU1_DMEM_1
    labels
 +30/-29 
linker.cmd
RTU1 linker memory allocation corrections                               

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Updated instruction RAM label from PRU_IMEM to RTU_IMEM with corrected
    size (8 KB instead of 12 KB)
  • Corrected data memory allocations to use proper core/slice naming:
    PRU1_DMEM_1, RTU1_DMEM_1, TX_PRU1_DMEM_1
  • Updated control register labels to match RTU1 core: TM_CFG_RTU1,
    RTU1_CTRL
  • Updated include path reference from include/PROCESSOR/pru_intc.h to
    source/include/c_code/PROCESSOR/pru_intc.h
  • Updated all section allocations to use RTU_IMEM and RTU1_DMEM_1 labels
 +30/-29 
linker.cmd
PRU1 linker memory allocation corrections                               

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations to use proper core/slice naming:
    PRU1_DMEM_1, RTU1_DMEM_1, TX_PRU1_DMEM_1
  • Updated control register labels to match PRU1 core: TM_CFG_PRU1,
    PRU1_CTRL
  • Updated include path reference from include/PROCESSOR/pru_intc.h to
    source/include/c_code/PROCESSOR/pru_intc.h
  • Updated all section allocations to use PRU1_DMEM_1 label
 +26/-25 
linker.cmd
TX_PRU0 linker memory allocation corrections                         

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Updated instruction RAM label from PRU_IMEM to TX_PRU_IMEM with
    corrected size (6 KB instead of 12 KB)
  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
  • Updated control register labels to match TX_PRU0 core: TM_CFG_TX_PRU0,
    TX_PRU0_CTRL
  • Updated include path reference from include/PROCESSOR/pru_intc.h to
    source/include/c_code/PROCESSOR/pru_intc.h
  • Updated section allocation to use TX_PRU_IMEM label
 +10/-10 
linker.cmd
RTU0 linker memory allocation corrections                               

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Updated instruction RAM label from PRU_IMEM to RTU_IMEM with corrected
    size (8 KB instead of 12 KB)
  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
  • Updated control register labels to match RTU0 core: TM_CFG_RTU0,
    RTU0_CTRL
  • Updated include path reference from include/PROCESSOR/pru_intc.h to
    source/include/c_code/PROCESSOR/pru_intc.h
  • Updated section allocation to use RTU_IMEM label
 +10/-10 
linker.cmd
LCD_interface PRU1 linker memory allocation fix                   

examples/LCD_interface/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations to use proper core/slice naming:
    PRU1_DMEM_1, RTU1_DMEM_1, TX_PRU1_DMEM_1
  • Updated all section allocations from PRU0_DMEM_0 to PRU1_DMEM_1 for
    PRU1 core
 +21/-21 
linker.cmd
TX_PRU0 data memory allocation corrections                             

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
TX_PRU1 data memory allocation corrections                             

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
TX_PRU0 data memory allocation corrections                             

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
TX_PRU1 data memory allocation corrections                             

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
RTU_PRU0 data memory allocation corrections                           

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
RTU_PRU1 data memory allocation corrections                           

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
PRU0 data memory allocation corrections                                   

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
PRU1 data memory allocation corrections                                   

academy/getting_started_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
RTU_PRU0 data memory allocation corrections                           

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
RTU_PRU1 data memory allocation corrections                           

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
AM64x PRU0 data memory allocation corrections                       

academy/getting_started_labs/assembly_code/solution/firmware/am64x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
PRU0 data memory allocation corrections                                   

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
PRU1 data memory allocation corrections                                   

academy/getting_started_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
RTU_PRU0 data memory allocation corrections                           

academy/getting_started_labs/c_and_inline_assembly/solution/firmware/am243x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
RTU_PRU1 data memory allocation corrections                           

academy/getting_started_labs/c_and_inline_assembly/solution/firmware/am243x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
AM64x RTU_PRU0 data memory allocation corrections               

academy/getting_started_labs/c_and_inline_assembly/solution/firmware/am64x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
AM64x RTU_PRU1 data memory allocation corrections               

academy/getting_started_labs/c_and_inline_assembly/solution/firmware/am64x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU0_DMEM_0, RTU0_DMEM_0,
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
RTU_PRU0 data memory allocation corrections                           

academy/getting_started_labs/c_and_assembly/solution/firmware/am243x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected data memory allocations: PRU1_DMEM_1, RTU1_DMEM_1,
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_and_assembly/solution/firmware/am243x-lp/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_and_assembly/solution/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-lp/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-lp/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

academy/getting_started_labs/c_code/solution/firmware/am64x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

examples/rpmsg_echo_linux/firmware/am64x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 cores
    allocation
  • Fixed RTU0_DMEM_1 to RTU1_DMEM_1 to match core slice assignment
  • Fixed TX_PRU0_DMEM_1 to TX_PRU1_DMEM_1 to match core slice assignment
 +3/-3     
linker.cmd
Fix PRU memory labels to match core slice assignments       

examples/rpmsg_echo_linux/firmware/am64x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 cores
    allocation
  • Fixed RTU1_DMEM_0 to RTU0_DMEM_0 to match core slice assignment
  • Fixed TX_PRU1_DMEM_0 to TX_PRU0_DMEM_0 to match core slice assignment
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/spi_loopback/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM243x_TX_PRU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_TX_PRU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM243x_TX_PRU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_TX_PRU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM64x_TX_PRU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_TX_PRU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM64x_TX_PRU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_TX_PRU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am64x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am64x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM243x_PRU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_PRU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM243x_PRU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_PRU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM243x_RTU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_RTU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM243x_RTU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am243x/AM243x_RTU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM64x_PRU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_PRU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM64x_PRU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_PRU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
AM64x_RTU0.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_RTU0.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
AM64x_RTU1.cmd
Fix linker memory labels to match core allocation pattern

source/linker_cmd/c_code/am64x/AM64x_RTU1.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-lp/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/empty/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU1_DMEM_0 to PRU0_DMEM_0 for Slice0 core allocation
  • Changed RTU1_DMEM_0 and TX_PRU1_DMEM_0 to RTU0_DMEM_0 and
    TX_PRU0_DMEM_0
 +3/-3     
linker.cmd
Fix linker memory labels to match core allocation pattern

examples/LCD_interface/firmware/am243x-lp/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd

  • Corrected memory label naming to follow [core]_[memory] pattern
  • Changed PRU0_DMEM_1 to PRU1_DMEM_1 for Slice1 core allocation
  • Changed RTU0_DMEM_1 and TX_PRU0_DMEM_1 to RTU1_DMEM_1 and
    TX_PRU1_DMEM_1
 +3/-3     
Additional files
101 files
package.tirex.json +1/-1     
README.md +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
example.projectspec +2/-2     
linker.cmd +3/-3     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
linker.cmd +1/-1     
Additional files not shown

@nsaulnier-ti
AM263Px: update "AM263px" --> "AM263Px"
c5c8d6a 
The P should not be lowercase. Both the AM263Px business unit and the CCS
program call the device AM263Px, not AM263px.

Also add AM62x to some files where it was not correctly added before.

Signed-off-by: Nick Saulnier <nsaulnier@ti.com>
@nsaulnier-ti
linker.cmd: Use [core]_[memory] labeling
598bc4e 
The current labeling scheme for memory regions in the linker.cmd files is
confusing. Update the memory labels to be in this format:
[PRU core using the memory region]_[name of the memory region]

So the DMEM0 memory region used by PRU0 is PRU0_DMEM_0,
and the DMEM1 memory region used by PRU1 is PRU1_DMEM_1, and these
labels are consistent across all linker.cmd files.

Signed-off-by: Nick Saulnier <nsaulnier@ti.com>
@nsaulnier-ti
LCD_interface & multicore_sched: fix linker.cmd
cb3a4e6 
The linker.cmd files for these projects was PRU0's linker.cmd file copy/pasted
to all cores (PRU1, RTU0, RTU1, TX_PRU0, TX_PRU1). Fix the linker.cmd files,
and update the memory allocation labels as per commit
"linker.cmd: Use [core]_[memory] labeling"

Signed-off-by: Nick Saulnier <nsaulnier@ti.com>
@qodo-code-review
Copy link

qodo-code-review bot commented Feb 25, 2026

PR Reviewer Guide 🔍

Here are some key observations to aid the review process:

🎫 Ticket compliance analysis 🔶

83 - Partially compliant

Compliant requirements:

  • Evaluate replacing memory section nomenclature like PRU0_DMEM0 / TX_PRU0_DMEM1 to something else
  • (Proposal 1) Switch to label format [CORE-USING-ALLOCATION]_[MEMORY-REGION] so labels are the same across linker files and only offsets differ

Non-compliant requirements:

  • Update AM263px to AM263Px (both filenames & inside the files)

Requires further human verification:

  • Confirm all AM263px filenames and in-file strings were updated to AM263Px across the entire repo (not all diffs shown here)
  • Confirm the new label scheme is consistently applied across all linker variants/projects (diff truncated)
  • Validate resulting binaries still link and run correctly for each affected core (PRU/RTU/TX_PRU) and board variant
⏱️ Estimated effort to review: 4 🔵🔵🔵🔵⚪
🧪 No relevant tests
🔒 No security concerns identified
⚡ Recommended focus areas for review

Memory Map

IMEM/DMEM label changes and size changes (e.g., introducing TX_PRU_IMEM with 6 KB and re-pointing .text to it) can easily cause silent runtime issues if the actual core being built/loaded or the silicon memory map expectations differ. Double-check that each linker file’s IMEM length matches the target core and toolchain expectations, and that .text/entry placement remains correct for binary loading.

 
	/* 6 KB TX_PRU Instruction RAM */
	TX_PRU_IMEM	: org = 0x00000000 len = 0x00001800

      PAGE 1:
	/* Data RAMs */
	/* 8 KB PRU Data RAM 1; use only the first 4 KB for PRU1 and reserve
	 * the second 4 KB for RTU1 and Tx_PRU1 */
	PRU1_DMEM_1	: org = 0x00000000 len = 0x00001000	CREGISTER=24
	/* 8 KB PRU Data RAM 0; reserved completely for Slice0 cores - PRU0,
	 * RTU0 and Tx_PRU0; do not use for any Slice1 cores */
	PRU0_DMEM_0	: org = 0x00002000 len = 0x00001000	CREGISTER=25
	/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
	 * split equally between the corresponding RTU and Tx_PRU cores in
	 * each slice */
	RTU1_DMEM_1	: org = 0x00001000 len = 0x00000800
	TX_PRU1_DMEM_1	: org = 0x00001800 len = 0x00000800
	RTU0_DMEM_0	: org = 0x00003000 len = 0x00000800
	TX_PRU0_DMEM_0	: org = 0x00003800 len = 0x00000800
Section Placement

Many sections are moved to *_DMEM_1 (e.g., .stack, .bss, .data, .rodata). Verify this aligns with the intended slice/core ownership and that no project expects these sections in *_DMEM_0. Also ensure the DMEM split (first 4 KB vs second 4 KB) is respected by combined usage (PRU/RTU/TX_PRU) to avoid overlap.

 
/* Forces _c_int00 to the start of Tx_PRU IRAM. Not necessary when loading
   an ELF file, but useful when loading a binary */
.text:_c_int00*	>  0x0, PAGE 0

.text		>  TX_PRU_IMEM, PAGE 0
.stack		>  TX_PRU1_DMEM_1, PAGE 1
.bss		>  TX_PRU1_DMEM_1, PAGE 1
.cio		>  TX_PRU1_DMEM_1, PAGE 1
.data		>  TX_PRU1_DMEM_1, PAGE 1
.switch		>  TX_PRU1_DMEM_1, PAGE 1
.sysmem		>  TX_PRU1_DMEM_1, PAGE 1
.cinit		>  TX_PRU1_DMEM_1, PAGE 1
.rodata		>  TX_PRU1_DMEM_1, PAGE 1
.rofardata	>  TX_PRU1_DMEM_1, PAGE 1
.farbss		>  TX_PRU1_DMEM_1, PAGE 1
.fardata	>  TX_PRU1_DMEM_1, PAGE 1
CREGISTER/Peripherals

New/renamed peripheral mappings (e.g., TM_CFG_RTU1, RTU1_CTRL, PRU_RTU_RAT1) should be verified against the device TRM for correct base addresses and that the chosen CREGISTER indices don’t conflict with existing mappings in the same file. A wrong base address or CREGISTER index may compile/link but break at runtime.

 
TM_CFG_RTU1	: org = 0x0002A300 len = 0x0000004C	CREGISTER=10
RTU1_CTRL	: org = 0x00023800 len = 0x00000030	CREGISTER=11

PA_STATS_QRAM	: org = 0x00027000 len = 0x00001000	CREGISTER=12
PA_STATS_CRAM	: org = 0x0002C000 len = 0x00001000	CREGISTER=13
MII_MDIO	: org = 0x00032400 len = 0x00000088	CREGISTER=21
PRU_RTU_RAT1	: org = 0x00009000 len = 0x00000854	CREGISTER=22
PRU_IEP0	: org = 0x0002E000 len = 0x00000100	CREGISTER=26

@qodo-code-review
Copy link

qodo-code-review bot commented Feb 25, 2026

PR Code Suggestions ✨

Explore these optional code suggestions:

CategorySuggestion                                                                                                                                    Impact
High-level
Use templates for linker files

Instead of manually updating numerous duplicated linker command files, create a
few master template files. The build system can then generate the final linker
scripts by substituting target-specific values.

Examples:

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd [10-99]
examples/multicore_scheduler/firmware/am243x-lp/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd [10-99]

Solution Walkthrough:

Before:

// File: .../pru0_fw/linker.cmd
MEMORY {
    PAGE 0:
        PRU_IMEM : org = 0x0, len = 0x3000
    PAGE 1:
        PRU0_DMEM_0 : org = 0x0, len = 0x1000
        PRU0_DMEM_1 : org = 0x2000, len = 0x1000
}
SECTIONS {
    .text > PRU_IMEM
    .stack > PRU0_DMEM_0
}

// File: .../pru1_fw/linker.cmd
MEMORY {
    PAGE 0:
        PRU_IMEM : org = 0x0, len = 0x3000
    PAGE 1:
        PRU0_DMEM_0 : org = 0x0, len = 0x1000
        PRU0_DMEM_1 : org = 0x2000, len = 0x1000
}
SECTIONS {
    .text > PRU_IMEM
    .stack > PRU0_DMEM_1
}

After:

// File: linker.cmd.template
MEMORY {
    PAGE 0:
        {{IMEM_NAME}} : org = {{IMEM_ORG}}, len = {{IMEM_LEN}}
    PAGE 1:
        PRU0_DMEM_0 : org = 0x2000, len = 0x1000
        PRU1_DMEM_1 : org = 0x0, len = 0x1000
        ...
}
SECTIONS {
    .text > {{IMEM_NAME}}
    .stack > {{DMEM_NAME}}
}

// Build script logic
// For target pru0:
//   substitute IMEM_NAME=PRU_IMEM, DMEM_NAME=PRU0_DMEM_0, etc.
// For target tx_pru1:
//   substitute IMEM_NAME=TX_PRU_IMEM, DMEM_NAME=TX_PRU1_DMEM_1, etc.
Suggestion importance[1-10]: 9

__

Why: The suggestion correctly identifies a critical maintainability issue due to widespread duplication of linker files, and proposing a template-based solution is a significant architectural improvement that would prevent such large, repetitive changes in the future.

High
Organization
best practice
Fix file header filename

Update the header to reference the real file name (linker.cmd) so file-name
references match on-disk capitalization and do not mislead readers/tools.

academy/getting_started_labs/assembly_code/solution/firmware/am263px-cc/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd [1-6]

 /*
- * AM263Px_PRU0.cmd
+ * linker.cmd
  *
  * Example Linker command file for linking assembly programs built with the TI-PRU-CGT
  * on AM263Px PRU0 cores
  */
  • Apply / Chat
Suggestion importance[1-10]: 6

__

Why:
Relevant best practice - File headers must match the actual file name and capitalization.

Low
Standardize identifier capitalization

Use consistent capitalization for the core name (for example, TX_PRU) to match
the rest of the memory labels and reduce ambiguity.

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd [83-84]

-/* Forces _c_int00 to the start of Tx_PRU IRAM. Not necessary when loading
+/* Forces _c_int00 to the start of TX_PRU IRAM. Not necessary when loading
    an ELF file, but useful when loading a binary */

[To ensure code accuracy, apply this suggestion manually]

Suggestion importance[1-10]: 5

__

Why:
Relevant best practice - Keep naming/capitalization consistent for readability and to avoid confusion in hardware-specific identifiers.

Low
  • More

@qodo-code-review
Copy link

qodo-code-review bot commented Feb 25, 2026

PR Compliance Guide 🔍

Below is a summary of compliance checks for this PR:

Security Compliance
🟢
No security concerns identified No security vulnerabilities detected by AI analysis. Human verification advised for critical code.
Ticket Compliance
🟡
🎫 #83
🟢 Replace/evaluate memory section nomenclature such as PRU0_DMEM0 / TX_PRU0_DMEM1 to a
clearer naming scheme (ticket includes proposal to use
[CORE-USING-ALLOCATION]_[MEMORY-REGION]).
⚪ Update `AM263px` to `AM263Px` (both filenames and occurrences inside the files).
Codebase Duplication Compliance
⚪
Codebase context is not defined

Follow the guide to enable codebase context checks.

Custom Compliance
⚪
No custom compliance provided

Follow the guide to enable custom compliance check.
Compliance status legend 🟢 - Fully Compliant
🟡 - Partial Compliant
🔴 - Not Compliant
⚪ - Requires Further Human Verification
🏷️ - Compliance label

@pratheesh-ti
Copy link
Collaborator

pratheesh-ti commented Mar 3, 2026

/agentic_review

@qodo-code-review
Copy link

qodo-code-review bot commented Mar 3, 2026 •
edited
Loading

Code Review by Qodo

🐞 Bugs (0) 📘 Rule violations (2) 📎 Requirement gaps (0)

Grey Divider


Remediation recommended

1. PROCESSOR path reference wrong 📘 Rule violation ✓ Correctness
Description 
The updated linker.cmd comment references source/include/c_code/PROCESSOR/pru_intc.h, but the
repository uses processor-specific subdirectories (e.g., c_code/am243x). This can mislead
developers and breaks the compliance requirement that path references match on-disk paths/casing.
Code

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[50]

+	 * source/include/c_code/PROCESSOR/pru_intc.h */
Evidence 
PR Compliance ID 25 requires file references to match real repository paths/casing. The modified
linker.cmd line points to a .../PROCESSOR/... directory that does not align with the documented
include layout under source/include/c_code/<processor>/.

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[50-50]
source/include/README.md[8-16]
Best Practice: Learned patterns

Agent prompt 
The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
A modified comment in a linker command file references `source/include/c_code/PROCESSOR/pru_intc.h`, but the repo layout uses processor-specific directories (e.g., `source/include/c_code/am243x/pru_intc.h`). This violates the requirement that repository path references match on-disk paths/casing.

## Issue Context
The path appears in a comment intended to help developers locate `pru_intc.h` for structure splitting guidance.

## Fix Focus Areas
- examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[47-50]

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools

2. Tabs in TX_PRU_IMEM line 📘 Rule violation ✓ Correctness
Description 
The modified linker.cmd content uses tab characters for indentation/alignment. This violates the
whitespace standard requiring 4-space indentation and no tabs.
Code

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[14]

+	TX_PRU_IMEM	: org = 0x00000000 len = 0x00001800
Evidence 
PR Compliance ID 18 forbids tabs and requires 4-space indentation. The modified line defining
TX_PRU_IMEM begins with a tab and uses tabs for alignment.

examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[13-14]
Best Practice: Repository guidelines

Agent prompt 
The issue below was found during a code review. Follow the provided context and guidance below and implement a solution

## Issue description
Modified linker.cmd lines use tab characters for indentation/alignment, but the formatting standard requires 4-space indentation and forbids tabs.

## Issue Context
The affected line is within the updated IMEM definition and is part of a modified hunk in this PR.

## Fix Focus Areas
- examples/multicore_scheduler/firmware/am243x-lp/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd[13-20]

ⓘ Copy this prompt and use it to remediate the issue with your preferred AI generation tools

Grey Divider

ⓘ The new review experience is currently in Beta. Learn more

Grey Divider

Qodo Logo

@nsaulnier-ti nsaulnier-ti merged commit 8efa60c into main Mar 5, 2026
1 check passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

@pratheesh-ti pratheesh-ti pratheesh-ti approved these changes

@manojKoppolu manojKoppolu manojKoppolu approved these changes

@dhavaljk dhavaljk Awaiting requested review from dhavaljk

Assignees

No one assigned

Labels

Review effort 4/5

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

Update linker.cmd file labels

3 participants

@nsaulnier-ti @pratheesh-ti @manojKoppolu