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Merged
nsaulnier-ti merged 3 commits into from
Mar 5, 2026
Merged

Update all linker.cmd files #114

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c5c8d6a
AM263Px: update "AM263px" --> "AM263Px"
nsaulnier-ti Feb 24, 2026
598bc4e
linker.cmd: Use [core]_[memory] labeling
nsaulnier-ti Feb 24, 2026
cb3a4e6
LCD_interface & multicore_sched: fix linker.cmd
nsaulnier-ti Feb 25, 2026
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2 changes: 1 addition & 1 deletion .metadata/.tirex/package.tirex.json
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Expand Up @@ -7,7 +7,7 @@
"version": "01.00.00.00",
"type": "software",
"license": "../../LICENSE",
"devices": ["AM243x", "AM64x", "AM261x", "AM263px", "AM263x"],
"devices": ["AM243x", "AM64x", "AM261x", "AM263Px", "AM263x", "AM62x"],
"tags": ["Baremetal", "FreeRTOS", "Linux"],
"description": "Welcome to OpenPRU. This repository contains examples, training, and tools to develop PRU applications.",
"dependencies": [
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -24,7 +24,7 @@ The OpenPRU project currently supports these processors:
- AM243x: [AM2431](https://www.ti.com/product/AM2431), [AM2432](https://www.ti.com/product/AM2432), [AM2434](https://www.ti.com/product/AM2434)
- AM261x: [AM2612](https://www.ti.com/product/AM2612)
- AM263x: [AM2631](https://www.ti.com/product/AM2631), [AM2631-Q1](https://www.ti.com/product/AM2631-Q1), [AM2632](https://www.ti.com/product/AM2632), [AM2632-Q1](https://www.ti.com/product/AM2632-Q1), [AM2634](https://www.ti.com/product/AM2634), [AM2634-Q1](https://www.ti.com/product/AM2634-Q1)
- AM263px: [AM263P2-Q1](https://www.ti.com/product/AM263P2-Q1), [AM263P2](https://www.ti.com/product/AM263P2), [AM263P4-Q1](https://www.ti.com/product/AM263P4-Q1), [AM263P4](https://www.ti.com/product/AM263P4)
- AM263Px: [AM263P2-Q1](https://www.ti.com/product/AM263P2-Q1), [AM263P2](https://www.ti.com/product/AM263P2), [AM263P4-Q1](https://www.ti.com/product/AM263P4-Q1), [AM263P4](https://www.ti.com/product/AM263P4)
- AM62x: [AM623](https://www.ti.com/product/AM623), [AM625](https://www.ti.com/product/AM625)
- AM64x: [AM6411](https://www.ti.com/product/AM6411), [AM6412](https://www.ti.com/product/AM6412), [AM6421](https://www.ti.com/product/AM6421), [AM6422](https://www.ti.com/product/AM6422), [AM6441](https://www.ti.com/product/AM6441), [AM6442](https://www.ti.com/product/AM6442).

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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am261x-lp/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am261x-lp/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am261x-som/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am261x-som/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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4 changes: 2 additions & 2 deletions academy/crc/crc/firmware/am263px-cc/icss_m0_pru0_fw/ti-pru-cgt/example.projectspec
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Expand Up @@ -4,7 +4,7 @@
<when>
<context
deviceFamily="PRU"
deviceId="AM263px"
deviceId="AM263Px"
/>
</when>
</applicability>
Expand All @@ -20,7 +20,7 @@
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM263px"
device="AM263Px"
deviceCore="ICSSM_PRU_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
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6 changes: 3 additions & 3 deletions academy/crc/crc/firmware/am263px-cc/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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@@ -1,8 +1,8 @@
/*
* AM263px_PRU0.cmd
* AM263Px_PRU0.cmd
*
* Example Linker command file for linking assembly programs built with the TI-PRU-CGT
* on AM263px PRU0 cores
* on AM263Px PRU0 cores
*/

/* Specify the System Memory Map */
Expand All @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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4 changes: 2 additions & 2 deletions academy/crc/crc/firmware/am263px-cc/icss_m0_pru1_fw/ti-pru-cgt/example.projectspec
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Expand Up @@ -4,7 +4,7 @@
<when>
<context
deviceFamily="PRU"
deviceId="AM263px"
deviceId="AM263Px"
/>
</when>
</applicability>
Expand All @@ -20,7 +20,7 @@
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM263px"
device="AM263Px"
deviceCore="ICSSM_PRU_1"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
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6 changes: 3 additions & 3 deletions academy/crc/crc/firmware/am263px-cc/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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@@ -1,8 +1,8 @@
/*
* AM263px_PRU1.cmd
* AM263Px_PRU1.cmd
*
* Example Linker command file for linking assembly programs built with the TI-PRU-CGT
* on AM263px PRU1 cores
* on AM263Px PRU1 cores
*/

/* Specify the System Memory Map */
Expand All @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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4 changes: 2 additions & 2 deletions academy/crc/crc/firmware/am263px-lp/icss_m0_pru0_fw/ti-pru-cgt/example.projectspec
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Expand Up @@ -4,7 +4,7 @@
<when>
<context
deviceFamily="PRU"
deviceId="AM263px"
deviceId="AM263Px"
/>
</when>
</applicability>
Expand All @@ -20,7 +20,7 @@
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM263px"
device="AM263Px"
deviceCore="ICSSM_PRU_0"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
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6 changes: 3 additions & 3 deletions academy/crc/crc/firmware/am263px-lp/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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@@ -1,8 +1,8 @@
/*
* AM263px_PRU0.cmd
* AM263Px_PRU0.cmd
*
* Example Linker command file for linking assembly programs built with the TI-PRU-CGT
* on AM263px PRU0 cores
* on AM263Px PRU0 cores
*/

/* Specify the System Memory Map */
Expand All @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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4 changes: 2 additions & 2 deletions academy/crc/crc/firmware/am263px-lp/icss_m0_pru1_fw/ti-pru-cgt/example.projectspec
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Expand Up @@ -4,7 +4,7 @@
<when>
<context
deviceFamily="PRU"
deviceId="AM263px"
deviceId="AM263Px"
/>
</when>
</applicability>
Expand All @@ -20,7 +20,7 @@
connection="TIXDS110_Connection.xml"
toolChain="TI"
cgtVersion="2.3.3"
device="AM263px"
device="AM263Px"
deviceCore="ICSSM_PRU_1"
ignoreDefaultDeviceSettings="true"
ignoreDefaultCCSSettings="true"
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6 changes: 3 additions & 3 deletions academy/crc/crc/firmware/am263px-lp/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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@@ -1,8 +1,8 @@
/*
* AM263px_PRU1.cmd
* AM263Px_PRU1.cmd
*
* Example Linker command file for linking assembly programs built with the TI-PRU-CGT
* on AM263px PRU1 cores
* on AM263Px PRU1 cores
*/

/* Specify the System Memory Map */
Expand All @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am263x-cc/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am263x-cc/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am263x-lp/icss_m0_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 0 */
PRU0_DMEM_0 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 1 */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00002000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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2 changes: 1 addition & 1 deletion academy/crc/crc/firmware/am263x-lp/icss_m0_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -17,7 +17,7 @@ MEMORY
/* 8 KB PRU Data RAM 1 */
PRU1_DMEM_1 : org = 0x00000000 len = 0x00002000
/* 8 KB PRU Data RAM 0 */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00002000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00002000

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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6 changes: 3 additions & 3 deletions ...ted_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU0_DMEM_0 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 1; reserved completely for Slice1 cores - PRU1,
* RTU1 and Tx_PRU1; do not use for any Slice0 cores */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00001000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU0_DMEM_0 : org = 0x00001000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00001800 len = 0x00000800
RTU0_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_1 : org = 0x00003800 len = 0x00000800
RTU1_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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6 changes: 3 additions & 3 deletions ...ted_labs/assembly_code/solution/firmware/am243x-evm/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU1_DMEM_1 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 0; reserved completely for Slice0 cores - PRU0,
* RTU0 and Tx_PRU0; do not use for any Slice1 cores */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00001000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU1_DMEM_1 : org = 0x00001000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00001800 len = 0x00000800
RTU1_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_0 : org = 0x00003800 len = 0x00000800
RTU0_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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6 changes: 3 additions & 3 deletions ...labs/assembly_code/solution/firmware/am243x-evm/icss_g0_rtu_pru0_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU0_DMEM_0 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 1; reserved completely for Slice1 cores - PRU1,
* RTU1 and Tx_PRU1; do not use for any Slice0 cores */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00001000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU0_DMEM_0 : org = 0x00001000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00001800 len = 0x00000800
RTU0_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_1 : org = 0x00003800 len = 0x00000800
RTU1_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
Expand Down
6 changes: 3 additions & 3 deletions ...labs/assembly_code/solution/firmware/am243x-evm/icss_g0_rtu_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU1_DMEM_1 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 0; reserved completely for Slice0 cores - PRU0,
* RTU0 and Tx_PRU0; do not use for any Slice1 cores */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00001000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU1_DMEM_1 : org = 0x00001000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00001800 len = 0x00000800
RTU1_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_0 : org = 0x00003800 len = 0x00000800
RTU0_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
Expand Down
6 changes: 3 additions & 3 deletions ..._labs/assembly_code/solution/firmware/am243x-evm/icss_g0_tx_pru0_fw/ti-pru-cgt/linker.cmd
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Original file line number Diff line number Diff line change
Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU0_DMEM_0 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 1; reserved completely for Slice1 cores - PRU1,
* RTU1 and Tx_PRU1; do not use for any Slice0 cores */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00001000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU0_DMEM_0 : org = 0x00001000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00001800 len = 0x00000800
RTU0_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_1 : org = 0x00003800 len = 0x00000800
RTU1_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
Expand Down
6 changes: 3 additions & 3 deletions ..._labs/assembly_code/solution/firmware/am243x-evm/icss_g0_tx_pru1_fw/ti-pru-cgt/linker.cmd
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Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU1_DMEM_1 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 0; reserved completely for Slice0 cores - PRU0,
* RTU0 and Tx_PRU0; do not use for any Slice1 cores */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00001000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU1_DMEM_1 : org = 0x00001000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00001800 len = 0x00000800
RTU1_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_0 : org = 0x00003800 len = 0x00000800
RTU0_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
Expand Down
6 changes: 3 additions & 3 deletions ...rted_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_pru0_fw/ti-pru-cgt/linker.cmd
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Original file line number Diff line number Diff line change
Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU0_DMEM_0 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 1; reserved completely for Slice1 cores - PRU1,
* RTU1 and Tx_PRU1; do not use for any Slice0 cores */
PRU0_DMEM_1 : org = 0x00002000 len = 0x00001000
PRU1_DMEM_1 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU0_DMEM_0 : org = 0x00001000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00001800 len = 0x00000800
RTU0_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_1 : org = 0x00003800 len = 0x00000800
RTU1_DMEM_1 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00003800 len = 0x00000800

PAGE 2:
/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
Expand Down
6 changes: 3 additions & 3 deletions ...rted_labs/assembly_code/solution/firmware/am243x-lp/icss_g0_pru1_fw/ti-pru-cgt/linker.cmd
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Original file line number Diff line number Diff line change
Expand Up @@ -19,14 +19,14 @@ MEMORY
PRU1_DMEM_1 : org = 0x00000000 len = 0x00001000
/* 8 KB PRU Data RAM 0; reserved completely for Slice0 cores - PRU0,
* RTU0 and Tx_PRU0; do not use for any Slice1 cores */
PRU1_DMEM_0 : org = 0x00002000 len = 0x00001000
PRU0_DMEM_0 : org = 0x00002000 len = 0x00001000
/* NOTE: Custom split of the second 4 KB of ICSS Data RAMs 0 and 1
* split equally between the corresponding RTU and Tx_PRU cores in
* each slice */
RTU1_DMEM_1 : org = 0x00001000 len = 0x00000800
TX_PRU1_DMEM_1 : org = 0x00001800 len = 0x00000800
RTU1_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU1_DMEM_0 : org = 0x00003800 len = 0x00000800
RTU0_DMEM_0 : org = 0x00003000 len = 0x00000800
TX_PRU0_DMEM_0 : org = 0x00003800 len = 0x00000800

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/* C28 needs to be programmed to point to SHAREDMEM, default is 0 */
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