fix(U-Boot): Correct R5 SPL core for J722S #279
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In J722S boot flow, R5 SPL runs on the MCU domain R5 and not the MAIN domain R5. Correct this by adding a separate boot flow diagram for J72SS as it's flow is different from any of the others. Fixes: e557295 ("J722S: Add doc support for J7AEN") Reported-by: Diwakar Dhyani <[email protected]> Signed-off-by: Neha Malcom Francis <[email protected]>
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| @@ -1722,6 +1722,79 @@ Boot Flow | |||
| Here |__SYSFW_CORE_NAME__| acts as master and provides all the critical services. R5/ARM64 | |||
| requests |__SYSFW_CORE_NAME__| to get these services done as shown in the above diagram. | |||
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| .. ifconfig:: CONFIG_part_variant in ('J722S') | |||
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Alright, I don't really like the size of this diff compared to the amount of content actually changing, but that's not really that big of an issue I guess.
I am concerned as to why this is applicable to J722S but not AM62P. @bryanbrattlof @h-nagalla can you comment? At this point I think the original table being copied here was also using the wrong nomenclature.
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Humm.. I believe for both devices DMR5 is in WKUP domain. Check this pds doc:
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@h-nagalla public list. removed the pds link reference ( not accesible from here)
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Yeah this ROM code is heavily recycled from the 62A/62P Sitara class of SoCs which use a somewhat dedicated R5 core in the 'Wakeup Island" (sometimes called the Device Manger core) for the Public ROM code as well as for DM after U-Boot has finished booting with it.
We could probably do a better job of calling this out in the TRM, but check out chapter 7.4.1 for a little more on the roles the WKUP_R5FSS plays during boot
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@nehamalcom any update on this PR closure
In J722S boot flow, R5 SPL runs on the MCU domain R5 and not the MAIN domain R5. Correct this by adding a separate boot flow diagram for J72SS as it's flow is different from any of the others.
Fixes: e557295 ("J722S: Add doc support for J7AEN")
Reported-by: Diwakar Dhyani [email protected]
Signed-off-by: Neha Malcom Francis [email protected]