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fix(U-Boot): Correct R5 SPL core for J722S #279

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fix(U-Boot): Correct R5 SPL core for J722S #279

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75 changes: 74 additions & 1 deletion source/linux/Foundational_Components/U-Boot/UG-General-Info.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -1649,7 +1649,7 @@ Boot Flow
| | | | |
+------------------------------------------------------------------------+-----------------------+

.. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62AX', 'AM62PX', 'J722S')
.. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62AX', 'AM62PX')

.. code-block:: text

Expand Down Expand Up @@ -1722,6 +1722,79 @@ Boot Flow
Here |__SYSFW_CORE_NAME__| acts as master and provides all the critical services. R5/ARM64
requests |__SYSFW_CORE_NAME__| to get these services done as shown in the above diagram.

.. ifconfig:: CONFIG_part_variant in ('J722S')
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@StaticRocket StaticRocket Apr 28, 2025 •
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Alright, I don't really like the size of this diff compared to the amount of content actually changing, but that's not really that big of an issue I guess.

I am concerned as to why this is applicable to J722S but not AM62P. @bryanbrattlof @h-nagalla can you comment? At this point I think the original table being copied here was also using the wrong nomenclature.

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@h-nagalla h-nagalla Apr 29, 2025 •
edited by praneethbajjuri
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Humm.. I believe for both devices DMR5 is in WKUP domain. Check this pds doc:

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@h-nagalla public list. removed the pds link reference ( not accesible from here)

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Yeah this ROM code is heavily recycled from the 62A/62P Sitara class of SoCs which use a somewhat dedicated R5 core in the 'Wakeup Island" (sometimes called the Device Manger core) for the Public ROM code as well as for DM after U-Boot has finished booting with it.

We could probably do a better job of calling this out in the TRM, but check out chapter 7.4.1 for a little more on the roles the WKUP_R5FSS plays during boot

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@nehamalcom any update on this PR closure


.. code-block:: text

+------------------------------------------------------------------------+
| TIFS | MCU R5 | A53 |
+------------------------------------------------------------------------+
| +--------+ | | |
| | Reset | | | |
| +--------+ | | |
| : | | |
| +--------+ | +-----------+ | |
| | *ROM* |----------|-->| Reset rls | | |
| +--------+ | +-----------+ | |
| | | | : | |
| | ROM | | : | |
| |services| | : | |
| | | | +-------------+ | |
| | | | | *R5 ROM* | | |
| | | | +-------------+ | |
| | |<---------|---|Load and auth| | |
| | | | | tiboot3.bin | | |
| +--------+ | +-------------+ | |
| | |<---------|---| Load sysfw | | |
| | | | | part to TIFS| | |
| | | | | core | | |
| | | | +-------------+ | |
| | | | : | |
| | | | : | |
| | | | : | |
| | | | +-------------+ | |
| | | | | *R5 SPL* | | |
| | | | +-------------+ | |
| | | | | DDR | | |
| | | | | config | | |
| | | | +-------------+ | |
| | | | | Load | | |
| | | | | tispl.bin | | |
| | | | +-------------+ | |
| | | | | Load R5 | | |
| | | | | firmware | | |
| | | | +-------------+ | |
| | |<---------|---| Start A53 | | |
| | | | | and jump to | | |
| | | | | DM fw image | | |
| | | | +-------------+ | |
| | | | | +-----------+ |
| | |----------|-----------------------|---->| Reset rls | |
| | | | | +-----------+ |
| | TIFS | | | : |
| |Services| | | +-----------+ |
| | |<---------|-----------------------|---->|*ATF/OPTEE*| |
| | | | | +-----------+ |
| | | | | : |
| | | | | +-----------+ |
| | |<---------|-----------------------|---->| *A53 SPL* | |
| | | | | +-----------+ |
| | | | | | Load | |
| | | | | | u-boot.img| |
| | | | | +-----------+ |
| | | | | : |
| | | | | +-----------+ |
| | |<---------|-----------------------|---->| *U-Boot* | |
| | | | | +-----------+ |
| | | | | | prompt | |
| | |----------|-----------------------|-----+-----------+-----|
| +--------+ | | |
| | | |
+------------------------------------------------------------------------+

Here |__SYSFW_CORE_NAME__| acts as master and provides all the critical services. R5/ARM64
requests |__SYSFW_CORE_NAME__| to get these services done as shown in the above diagram.

.. ifconfig:: CONFIG_part_variant in ('AM62LX')

Unlike with most other K3 SoCs the AM62LX does not have an Cortext-R5
Expand Down