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πŸŽ“
A lazy coder
πŸŽ“
A lazy coder

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πŸ‘¨β€πŸ’» About Me

  • πŸŽ“ Pursuing a B.Tech in Electronics Engineering
  • ⚑ Interested in RTL design, FPGA development, embedded systems, robotics, and signal processing
  • πŸ”­ Currently exploring Verilog HDL, AMBA protocols, microprocessors, STM32, and ESP32
  • πŸ’» Practising data structures, algorithms, and competitive programming
  • πŸ€– Interested in projects that combine hardware, software, and intelligence
  • 🧠 Curious by nature, with an ever-growing project list
  • β™Ÿ Learning chess one blunder at a time
  • 🏸 Enjoy playing badminton
  • 🀝 Open to collaborating on electronics, embedded, RTL, and programming projects
  • ⚑ Fun fact: the number 23 has a mysterious habit of appearing everywhere

πŸš€ Featured Projects

AMBA AHB–APB Bridge

A synthesizable Verilog implementation of an AMBA AHB-to-APB Bridge with RTL design, functional verification, simulation waveforms, and FPGA synthesis.

View Repository

Adaptive Noise Cancellation

An adaptive signal-processing project exploring real-time noise reduction techniques and hardware-oriented implementation.

Explore Projects


πŸ’» Languages and HDL

C C++ Java Python Ruby Verilog Bash Arduino


πŸ“š Libraries and Frameworks

NumPy Pandas Matplotlib OpenCV TensorFlow


πŸ”Œ Embedded Systems and Hardware

Arduino ESP32 STM32 FPGA Cyclone V AMBA


🧰 Tools and Development Platforms

Git GitHub VS Code Linux Ubuntu Quartus Prime QuestaSim Proteus PlatformIO STM32CubeIDE Arduino IDE


🧠 Technical Interests

Digital System Design
RTL Design and Verification
FPGA Development
Embedded Systems
Microprocessors and Microcontrollers
Signal Processing
Robotics
Computer Vision
Machine Learning
Competitive Programming

πŸ† Competitive Programming

LeetCode profile HackerRank profile Codeforces profile


πŸ“Š GitHub Statistics

GitHub statistics Top languages
GitHub contribution streak

πŸ“ˆ Contribution Activity

Contribution activity graph

🧩 Coding Profiles

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🌐 Connect With Me

Instagram

Stack Overflow

Discord

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GitHub

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πŸ’¬ Developer Quote

Developer Quote


β€œCuriosity is the clock signal that keeps every project running.”

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  1. AHB-APB-Bridge-Verilog AHB-APB-Bridge-Verilog Public

    Design, verification, and FPGA synthesis of an AMBA AHB-to-APB bridge using Verilog HDL, QuestaSim, and Intel Quartus Prime.

    Verilog