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5920780
Increased max data size for ZynqEmioPort
Jan 7, 2024
83473d7
Minor updates to test code
Jan 8, 2024
9507880
Made BitReverse32 a static method in EthBasePort; added ComputePhyId …
Jan 9, 2024
5c06848
Added ethswitch for FPGA V3 Ethernet switch diagnostics
Jan 19, 2024
0919a0e
Collect more data from FPGA V3 Ethernet switch
Jan 22, 2024
9bb4028
ethswitch displays port attributes
Jan 22, 2024
2163946
Updates to firmware debug data
Feb 2, 2024
f463f93
Update to firmware debug code
Feb 2, 2024
8c26f79
Added EthBasePort::ByteswapFirewireHeader and updated CheckFirewirePa…
Feb 4, 2024
d4a2c23
Updated raw ethernet interface to call pcap_set_immediate_mode for ne…
Feb 6, 2024
c0441b9
Minor pcap updates for raw Ethernet
pkazanzides Feb 6, 2024
4650f3f
Rev 9 compatible with Rev 8 for broadcast
Feb 6, 2024
6da9639
Updated ethswitch based on latest firmware
Feb 7, 2024
971fe2f
Added command line option to force use of Ethernet/Firewire bridge; u…
Feb 8, 2024
1f97a97
Updates to EthUdpPort for Firmware Rev 9
Feb 8, 2024
8326d9d
Update to EthUdpPort::InitNodes
Feb 8, 2024
0de0bf8
Ethernet updates based on firmware changes
Feb 13, 2024
85ffaf1
Ethernet updates for firmware Rev 9
Feb 13, 2024
3c4d817
Fixed compile on Windows
pkazanzides Feb 15, 2024
3f93891
Use UDP Multicast with FPGA V3
Feb 17, 2024
5cbb74d
Merge branch 'feature-eth-v9' of https://github.com/jhu-cisst/mechatr…
Feb 17, 2024
c5be25f
Minor updates to firmware debug data
Feb 18, 2024
d549b23
Disable Firewire bus generation check in Ethernet-only mode
Feb 19, 2024
7a6ad44
Fixed byteswap of Firewire header received via Ethernet
Feb 21, 2024
27eb310
Added isBroadcastReadOrdered
Feb 23, 2024
c872236
Improved diagnostic info in ReadAllBoardsBroadcast
Mar 18, 2024
77ae159
Updated ZynqEmioPort for embedded software change to use C++ classes
Mar 22, 2024
1f4510e
Support both mmap (default) and gpiod interfaces for Zynq EMIO
Mar 24, 2024
e98cdfa
Updates for broadcast read timing measurements
Mar 26, 2024
c280459
Firmware broadcast read timer now 16-bits; also detect timer overflow
Mar 26, 2024
01d951f
Updated FPGA V3 Ethernet timing for broadcast read
pkazanzides Mar 26, 2024
9350377
Added broadcast read size to bcReadInfo
pkazanzides Mar 26, 2024
da49bd4
Improved broadcast read implementation
pkazanzides Mar 26, 2024
98430d9
Added ReceiveBroadcastReadResponse (FPGA V3 Ethernet automatically se…
Mar 31, 2024
05dc9c5
Updated ethswitch to print list of board numbers
pkazanzides Apr 1, 2024
a35875a
Updates to raw Ethernet port
Apr 4, 2024
6492ab4
Fixed broadcast read/write for raw Ethernet
Apr 4, 2024
c5b31a8
Minor updates for older build tools
pkazanzides Apr 5, 2024
6018b6f
Ethernet now considers Firewire TL mismatch an error rather than a wa…
Apr 8, 2024
f1f26ac
Update HubBoard (if needed) for Ethernet-only broadcast read
Apr 8, 2024
00374b3
For Ethernet-only, flush receive buffer before sending broadcast read…
Apr 8, 2024
cb9b0c6
Merge pull request #31 from jhu-cisst/feature-eth-v9
pkazanzides Apr 16, 2024
6be8811
EthBasePort: increased wait time for udpfw
adeguet1 Apr 18, 2024
84ff4a2
Ethernet status/control updates for Firmware Rev 9
Apr 20, 2024
1ba09a0
FPGA V2 supports UDP multicast (Rev 9 firmware); added PrintDebugDataRTL
Apr 22, 2024
e28e473
Added diagnostic messages for broadcast read
Apr 23, 2024
fabe290
Updated Python wrapping (Swig)
pkazanzides Apr 23, 2024
df11302
Added PROM delay for Zynq EMIO interface
May 2, 2024
d4b1984
Added wait when reading/write RTL8211F registers; allow eth1394test t…
May 3, 2024
69d0c02
Print version info in ZynqEmioPort
May 5, 2024
bbded81
Improved block write test
May 5, 2024
3c12b59
More improvements to block write test
May 5, 2024
8cbc150
Added methods to read/write Firewire PHY
May 9, 2024
8c16267
Added OptimizeFirewireGapCount
May 9, 2024
0f525c0
CMake: install files for Python wrappers
adeguet1 Jul 16, 2024
d9ed3e8
Updated change log
pkazanzides Aug 29, 2024
d2856b4
merge from main
adeguet1 Aug 30, 2024
d08207b
ZynqEmioPort: added methods to get/set verbose flag and timeout
Dec 7, 2024
9e53108
Use block read for QLA S/N
Dec 9, 2024
9af04d0
Added support for Firewire debug data
Jan 26, 2025
31cffb5
Major cleanup of test program (eth1394Test)
Jan 26, 2025
2e067a1
Removed redundant block write test
Jan 26, 2025
c3a04ca
More updates to test software
Jan 26, 2025
8d68b17
Rename mainEth1394/eth1394Test to fpgatest
Jan 26, 2025
574ea4b
fpgatest: added verbose flag; support multiple reads in TestWaveform
Jan 26, 2025
8c4be3a
Updated find_package(Python); added CMake option AMP1394_PYTHON_VERSI…
pkazanzides Mar 22, 2025
2999442
Increased CMake minimum required from 3.10 to 3.16
pkazanzides Apr 2, 2025
127d75c
Updates for CMake and Swig
pkazanzides Apr 2, 2025
8865f80
dVRKtest file update
GKigner Apr 2, 2025
ef3de4e
merged swig updates
adeguet1 Apr 2, 2025
186b842
updated dvrktests; fixed bugs
GKigner Apr 16, 2025
8a886cd
final error fixed in boardSetUp
GKigner Apr 23, 2025
9fa8da3
Merge pull request #35 from GKigner/devel
pkazanzides Apr 23, 2025
9bd9e7f
Increased timeout in dvrktest
pkazanzides Apr 23, 2025
7df20a9
AmpIO.cpp: clarified message in ExplainSiFault when the controller is…
adeguet1 May 18, 2025
ce4784c
Implemented _kbhit for non-Windows systems
Jun 15, 2025
8e6a4f7
Merge branch 'devel' of https://github.com/jhu-cisst/mechatronics-sof…
Jun 15, 2025
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4 changes: 2 additions & 2 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#
# (C) Copyright 2011-2024 Johns Hopkins University (JHU), All Rights Reserved.
# (C) Copyright 2011-2025 Johns Hopkins University (JHU), All Rights Reserved.
#
# --- begin cisst license - do not edit ---
#
Expand All @@ -9,7 +9,7 @@
#
# --- end cisst license ---

cmake_minimum_required (VERSION 3.10)
cmake_minimum_required (VERSION 3.16)

project (Amp1394 VERSION 2.2.0)

Expand Down
36 changes: 19 additions & 17 deletions lib/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#
# (C) Copyright 2011-2021 Johns Hopkins University (JHU), All Rights Reserved.
# (C) Copyright 2011-2025 Johns Hopkins University (JHU), All Rights Reserved.
#
# --- begin cisst license - do not edit ---
#
Expand Down Expand Up @@ -65,29 +65,31 @@ if (Amp1394_BUILD_SWIG)
find_package(SWIG REQUIRED)
include(${SWIG_USE_FILE})

find_package(PythonLibs)
include_directories(${PYTHON_INCLUDE_PATH})
# Find Python and NumPy
set (AMP1394_PYTHON_VERSION_REQUIRED "" CACHE STRING "Required Python version (if not empty)")
if (AMP1394_PYTHON_VERSION_REQUIRED)
message (STATUS "Looking for Python ${AMP1394_PYTHON_VERSION_REQUIRED}")
find_package (Python ${AMP1394_PYTHON_VERSION_REQUIRED} EXACT REQUIRED COMPONENTS Development NumPy)
else ()
find_package (Python REQUIRED COMPONENTS Interpreter Development NumPy)
endif ()

find_package(PythonInterp)
if (PYTHON_EXECUTABLE)
execute_process(COMMAND ${PYTHON_EXECUTABLE} -c "import numpy; print(numpy.get_include())"
ERROR_QUIET
OUTPUT_VARIABLE Amp1394_NUMPY_INCLUDE_DIR
OUTPUT_STRIP_TRAILING_WHITESPACE)
include_directories(${Amp1394_NUMPY_INCLUDE_DIR} "${Amp1394_BINARY_DIR}/Amp1394")
endif()
include_directories(${Python_INCLUDE_DIRS} ${Python_NumPy_INCLUDE_DIRS})
include_directories("${Amp1394_BINARY_DIR}/Amp1394")

set_source_files_properties(Amp1394.i PROPERTIES CPLUSPLUS ON)
swig_add_module(Amp1394Python python Amp1394.i ${HEADERS} ${SOURCE_FILES})
swig_link_libraries(Amp1394Python ${PYTHON_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})
swig_add_library(Amp1394Python
LANGUAGE python
SOURCES Amp1394.i ${HEADERS} ${SOURCE_FILES})
target_link_libraries(Amp1394Python ${Python_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})

if (WIN32)
set_target_properties (_Amp1394Python PROPERTIES SUFFIX .pyd)
set_target_properties (_Amp1394Python PROPERTIES DEBUG_POSTFIX "_d")
set_target_properties (Amp1394Python PROPERTIES SUFFIX .pyd)
set_target_properties (Amp1394Python PROPERTIES DEBUG_POSTFIX "_d")
endif (WIN32)

# post build command
add_custom_command(TARGET _Amp1394Python POST_BUILD
add_custom_command(TARGET Amp1394Python POST_BUILD
COMMAND ${CMAKE_COMMAND}
ARGS -E copy_if_different
${CMAKE_CURRENT_BINARY_DIR}/Amp1394Python.py
Expand All @@ -104,7 +106,7 @@ if (Amp1394_BUILD_SWIG)

# install library and python file
install (
TARGETS _Amp1394Python
TARGETS Amp1394Python
RUNTIME DESTINATION bin
LIBRARY DESTINATION lib
COMPONENT Amp1394)
Expand Down
3 changes: 3 additions & 0 deletions lib/FpgaIO.h
Original file line number Diff line number Diff line change
Expand Up @@ -361,6 +361,9 @@ class FpgaIO : public BoardIO
// data Data to write to register
bool WriteFirewirePhy(unsigned char addr, unsigned char data);

// Print FireWire debug data
static void PrintFirewireDebug(std::ostream &debugStream, const quadlet_t *data);

protected:

// Accumulated firmware time
Expand Down
8 changes: 8 additions & 0 deletions lib/ZynqEmioPort.h
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,14 @@ class ZynqEmioPort : public BasePort {
ZynqEmioPort(int portNum = 0, std::ostream &debugStream = std::cerr);
~ZynqEmioPort();

// Get/set EMIO timeout in microseconds
double GetTimeout_us(void) const { return emio->GetTimeout_us(); }
void SetTimeout_us(double time_uSec) { emio->SetTimeout_us(time_uSec); }

// Get/set EMIO verbose flag
bool GetVerbose() const { return emio->GetVerbose(); }
void SetVerbose(bool newState) { emio->SetVerbose(newState); }

//****************** BasePort pure virtual methods ***********************

PortType GetPortType(void) const { return PORT_ZYNQ_EMIO; }
Expand Down
25 changes: 20 additions & 5 deletions lib/code/Amp1394Console.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
/*
Author(s): Peter Kazanzides

(C) Copyright 2021 Johns Hopkins University (JHU), All Rights Reserved.
(C) Copyright 2021-2025 Johns Hopkins University (JHU), All Rights Reserved.

--- begin cisst license - do not edit ---

Expand All @@ -29,6 +29,7 @@ no warranty. The complete license can be found in license.txt and
#include <curses.h>
#else
#include <termios.h>
#include <sys/select.h>
#endif
#endif

Expand Down Expand Up @@ -87,6 +88,19 @@ bool Amp1394Console::GetString(char *str, int n)
struct Amp1394Console::ConsoleInternals {
struct termios savedAttr;
};

// Implementation of _kbhit for non-Windows systems
int _kbhit()
{
struct timeval tv;
fd_set fds;
tv.tv_sec = 0;
tv.tv_usec = 0;
FD_ZERO(&fds);
FD_SET(STDIN_FILENO, &fds);
select(STDIN_FILENO+1, &fds, 0, 0, &tv);
return FD_ISSET(STDIN_FILENO, &fds);
}
#endif

bool Amp1394Console::Init()
Expand Down Expand Up @@ -169,14 +183,15 @@ void Amp1394Console::Refresh()

int Amp1394Console::GetChar()
{
#ifdef _MSC_VER
int c = -1; // ERR in curses
// If blocking, or if key pressed, call _getch
if (!noBlock || _kbhit())
// If blocking, or if key pressed, get a character
if (!noBlock || _kbhit()) {
#ifdef _MSC_VER
c = noEcho ? _getch() : _getche();
#else
int c = getchar();
c = getchar();
#endif
}
return c;
}

Expand Down
34 changes: 19 additions & 15 deletions lib/code/AmpIO.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -266,23 +266,27 @@ std::string AmpIO::GetQLASerialNumber(unsigned char chan)
// Format: QLA 1234-56 or QLA 1234-567.
// String is terminated by 0 or 0xff.
uint16_t address = 0x0000;
uint8_t data[20];
// QLASNSize must be a multiple of 4
const size_t QLASNSize = 12;
uint8_t data[QLASNSize+1];
std::string sn;

data[QLASNSize] = 0; // make sure null-terminated
for (size_t i = 0; i < QLASNSize; i++) {
if (!PromReadByte25AA128(address, data[i], chan)) {
if (chan == 0)
std::cerr << "AmpIO::GetQLASerialNumber: failed to get QLA Serial Number" << std::endl;
else
std::cerr << "AmpIO::GetQLASerialNumber: failed to get QLA " << static_cast<unsigned int>(chan)
<< " Serial Number" << std::endl;
break;
if (!PromReadBlock25AA128(address, reinterpret_cast<quadlet_t *>(data), QLASNSize/sizeof(quadlet_t), chan)) {
if (chan == 0)
std::cerr << "AmpIO::GetQLASerialNumber: failed to get QLA Serial Number" << std::endl;
else
std::cerr << "AmpIO::GetQLASerialNumber: failed to get QLA " << static_cast<unsigned int>(chan)
<< " Serial Number" << std::endl;
}
else {
// Convert any trailing 0xff characters to null (0)
for (int i = QLASNSize-1; i >= 0; i--) {
if (data[i] == 0xff)
data[i] = 0;
else if (data[i] != 0)
break;
}
if (data[i] == 0xff)
data[i] = 0;
address += 1;
}
if (strncmp((char *)data, "QLA ", 4) == 0 || strncmp((char *)data, "dRA ", 4) == 0)
sn.assign((char *)data+4);
Expand Down Expand Up @@ -1862,10 +1866,10 @@ void AmpIO::CheckCollectCallback()

//******* Following methods are for dRA1 ********

std::string AmpIO::ExplainSiFault() const
std::string AmpIO::ExplainSiFault(void) const
{
if (GetHardwareVersion() != dRA1_String) {
return "Not a Si controller";
return "Sorry, no detailed error code available for QLA based controllers.";
}
std::stringstream ss;
const char* amp_fault_text[16] = {"-", "ADC saturated", "Current deviation", "HW overcurrent", "HW overtemp", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined", "Undefined"};
Expand All @@ -1876,7 +1880,7 @@ std::string AmpIO::ExplainSiFault() const
if (!(status & (1 << 0))) ss << "ESPM->dVRK communication failed. Robot not programmed? Cables?" << std::endl;
if ((status & (1 << 0)) && !(status & (1 << 1))) ss << "ESII/CC->ESPM communication failed. The problem is inside the robot." << std::endl;
if (!(status & (1 << 3))) ss << "Encoder preload is out of sync. You must preload encoder at least once." << std::endl;
if (!GetPowerStatus()) ss << "48V bad. E-stop pressed?" << std::endl;
if (!GetPowerStatus()) ss << "48V bad. E-stop disconnected or button pressed?" << std::endl;
if (GetWatchdogTimeoutStatus()) ss << "Watchdog timeout." << std::endl;
ss << "(end)" << std::endl;
ss << std::endl;
Expand Down
60 changes: 60 additions & 0 deletions lib/code/FpgaIO.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -435,6 +435,10 @@ bool FpgaIO::PromReadBlock25AA128(uint16_t addr, quadlet_t *data, unsigned int n
if (!port->WriteQuadlet(BoardId, address, write_data))
return false;

// TODO: rather than PromDelay, can implement WaitProm25AA128, which can check
// the lowest 3 bits of the status register (0 -> IDLE)
port->PromDelay();

// get result
if (!port->ReadBlock(BoardId, (address|0x0100), data, nquads * 4))
return false;
Expand Down Expand Up @@ -760,3 +764,59 @@ bool FpgaIO::WriteFirewirePhy(unsigned char addr, unsigned char data)
quadlet_t write_data = 0x00001000 | static_cast<quadlet_t>(addr) << 8 | static_cast<quadlet_t>(data);
return port->WriteQuadlet(BoardId, BoardIO::FW_PHY_REQ, write_data);
}


void FpgaIO::PrintFirewireDebug(std::ostream &debugStream, const quadlet_t *data)
{
// Following structure must match DebugData in Firewire.v
struct DebugData {
char header[4]; // Quad 0
uint8_t misc_info; // Quad 1
uint8_t bus_info;
uint8_t lreq_info;
uint8_t state;
uint8_t numPhyStatus; // Quad 2
uint8_t numTxGrant;
uint8_t numRecv;
uint8_t numHubSendReq;
uint16_t stcount; // Quad 3
uint8_t numPktRecv;
uint8_t numEthSendReq;
};
const DebugData *p = reinterpret_cast<const DebugData *>(data);
if (strncmp(p->header, "DBG", 3) != 0) {
debugStream << " PrintFirewireDebug: Unexpected header string: " << p->header[0]
<< p->header[1] << p->header[2] << " (should be DBG)" << std::endl;
return;
}
debugStream << " State: " << static_cast<uint16_t>(p->state >> 4)
<< ", Next: " << static_cast<uint16_t>(p->state & 0xf0) << std::endl;
if (p->lreq_info & 0x80)
debugStream << " lreq_type: " << static_cast<uint16_t>((p->lreq_info & 0x70) >> 4) << std::endl;
if (p->lreq_info & 0x08)
debugStream << " lreq_busy" << std::endl;
debugStream << " tx_type: " << static_cast<uint16_t>(p->lreq_info & 0x07) << std::endl;
debugStream << " ";
if (p->bus_info & 0x80)
debugStream << "req_write_bus ";
if (p->bus_info & 0x40)
debugStream << "grant_write_bus ";
debugStream << "node_id: " << static_cast<uint16_t>(p->bus_info & 0x3f) << std::endl;
debugStream << " ";
if (p->misc_info & 0x80)
debugStream << "data_block ";
if (p->misc_info & 0x08)
debugStream << "recvCtlInvalid ";
if (p->misc_info & 0x04)
debugStream << "recvPktNull ";
if (p->misc_info & 0x02)
debugStream << "link_active ";
debugStream << " rx_speed: " << static_cast<uint16_t>((p->misc_info & 0x70)>>4) << std::endl;
debugStream << " numHubSendReq: " << static_cast<uint16_t>(p->numHubSendReq) << std::endl;
debugStream << " numRecv: " << static_cast<uint16_t>(p->numRecv) << std::endl;
debugStream << " numPktRecv: " << static_cast<uint16_t>(p->numPktRecv) << std::endl;
debugStream << " numTxGrant: " << static_cast<uint16_t>(p->numTxGrant) << std::endl;
debugStream << " numPhyStatus: " << static_cast<uint16_t>(p->numPhyStatus) << std::endl;
debugStream << " numEthSendReq: " << static_cast<uint16_t>(p->numEthSendReq) << std::endl;
debugStream << " stcount: " << p->stcount << std::endl;
}
6 changes: 3 additions & 3 deletions tests/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ target_link_libraries(qlacloserelays ${Amp1394_LIBRARIES} ${Amp1394_EXTRA_LIBRAR
add_executable(qlacommand qlacommand.cpp)
target_link_libraries(qlacommand ${Amp1394_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})

add_executable(eth1394Test mainEth1394.cpp MotorVoltage.h MotorVoltage.cpp)
target_link_libraries(eth1394Test ${Amp1394_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})
add_executable(fpgatest fpgatest.cpp MotorVoltage.h MotorVoltage.cpp)
target_link_libraries(fpgatest ${Amp1394_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})

add_executable(instrument instrument.cpp)
target_link_libraries(instrument ${Amp1394_LIBRARIES} ${Amp1394_EXTRA_LIBRARIES})
Expand All @@ -67,7 +67,7 @@ install (PROGRAMS ${EXECUTABLE_OUTPUT_PATH}/quad1394eth
COMPONENT Amp1394-utils
DESTINATION bin)

install (TARGETS qlacloserelays qlacommand eth1394Test instrument block1394eth enctest ethswitch
install (TARGETS qlacloserelays qlacommand fpgatest instrument block1394eth enctest ethswitch
COMPONENT Amp1394-utils
RUNTIME DESTINATION bin)

Expand Down
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