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[MIPS][MSA] Invert operand order of ILVOD when lowering VECTOR_SHUFFLE #123555

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Merged
merged 1 commit into from
Jan 21, 2025

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Cyanoxygen
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This PR fixes operand order of ILVOD.df when lowering VECTOR_SHUFFLE, the result was <y[1], x[1]> while it should be <x[1], y[1]>.

Background

Our Rust toolchain has a long-standing bug that stood unresolved: sha2::compress256 produces a wrong result if MSA is enabled.

Recently @liushuyu presented me with a minimal IR that can reproduce the problem, and here's the fix.

Testing

I have tested the patch with:

  • Bootstrapping a Rust toolchain with the patch applied, and
  • Build and run the minimal PoC that uses sha2::compress256
  • Compile and run simple program that utilizes vectors (addition and shuffle)

These tests looks good to me.

telegram-cloud-photo-size-1-4918091511221038641-y
The wrong result produced by compress256, compiled by the toolchain without the fix
telegram-cloud-photo-size-1-4918091511221038640-y
The test program no longer fails with the fix applied

The result was <y[1], x[1]> while it should be <x[1], y[1]>.

This affects the result of vector shuffles:

    %result = shufflevector <4 x i32> %x, <4 x i32> %y,
              <4 x 132> <i32 1, i32 5, i32 3, i32 7>

The mask above matches the pattern wanted by the ILVOD lowering.
The result is <%y[1], %x[1], %y[3], %x[3]>, while it should be
<%x[1], %y[1], %x[3], %y[3]>.

* tests/CodeGen/Mips: Update MSA shuffle tests according to the change.
@Cyanoxygen
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@wzssyqa I have split the change as per your request - please continue your review here. Thanks!

@wzssyqa wzssyqa merged commit 385f776 into llvm:main Jan 21, 2025
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2 participants