Fix/junction and test helper bugs

src/ChipDesigner/ChDArea.class.st

@@ -104,7 +104,7 @@ ChDArea >> addPAt: x y: y addConnections: connectionsInteger [
 	| aCell |
 
 	aCell := self atX: x y: y.
-	self substrateLayer setFor: aCell mode: #n.
+	self substrateLayer setFor: aCell mode: #p.
 	self substrateLayer connectionsFor: aCell add: connectionsInteger.
 	^ aCell
 

src/ChipDesigner/ChDAreaInputRegionsTest.class.st

@@ -88,3 +88,22 @@ ChDAreaInputRegionsTest >> testNotConnectedCell [
 
 	self assert: area regions size equals: 2.
 ]
+
+{ #category : #tests }
+ChDAreaInputRegionsTest >> testInputRegionCurrentStateReflectsStoredValue [
+
+	| region states |
+
+	region := (area atX: 1 y: 1) metalRegion.
+	self assert: region class name equals: 'ChDGeneratorRegion'.
+
+	states := (1 to: 20) collect: [ :i |
+		region currentState: true.
+		region currentState ].
+	self assert: (states allSatisfy: [ :value | value == true ]).
+
+	states := (1 to: 20) collect: [ :i |
+		region currentState: false.
+		region currentState ].
+	self assert: (states allSatisfy: [ :value | value == false ])
+]

src/ChipDesigner/ChDAreaTest.class.st

@@ -38,6 +38,16 @@ ChDAreaTest >> testAddNewStandaloneSubstrateRegion [
 	self assertCollection: area regions anyOne cells hasSameElements: {aCell}
 ]
 
+{ #category : #tests }
+ChDAreaTest >> testAddPAtSetsPSilicon [
+	| aCell |
+
+	aCell := area addPAt: 5 y: 5 addConnections: 2r0000.
+	area updateCell: aCell mode: #p.
+
+	self assert: aCell substrateType equals: #p
+]
+
 { #category : #tests }
 ChDAreaTest >> testMergeRegions [
 	| cell1 cell2 |

src/ChipDesigner/ChDGeneratorRegion.class.st

@@ -7,12 +7,6 @@ Class {
 	#category : #ChipDesigner
 }
 
-{ #category : #accessing }
-ChDGeneratorRegion >> currentState [
-
-	^ #(0 1) atRandom
-]
-
 { #category : #accessing }
 ChDGeneratorRegion >> isSpecial [
 

src/ChipDesigner/ChDHorizontalCompactRegionTest.class.st

@@ -0,0 +1,72 @@
+Class {
+	#name : #ChDHorizontalCompactRegionTest,
+	#superclass : #TestCase,
+	#instVars : [
+		'area',
+		'leftRegion',
+		'middleRegion',
+		'rightRegion'
+	],
+	#category : #'ChipDesigner-Tests'
+}
+
+{ #category : #running }
+ChDHorizontalCompactRegionTest >> junctionCellAt: aPoint connections: substrateConnections [
+
+	| cell region |
+	cell := area atX: aPoint x y: aPoint y.
+	region := area newJunctionRegion.
+	cell
+		substrateType: #n;
+		junctionType: #npn;
+		junctionConnections: 2r0101;
+		substrateConnections: substrateConnections;
+		substrateRegion: region.
+	region cells add: cell.
+	^ cell
+]
+
+{ #category : #running }
+ChDHorizontalCompactRegionTest >> refreshCompactRegions [
+
+	area regions select: #isJunction thenDo: #updateCompactRegions
+]
+
+{ #category : #running }
+ChDHorizontalCompactRegionTest >> setUp [
+
+	super setUp.
+
+	area := ChDArea withDefaultExtent.
+	self junctionCellAt: 2 @ 3 connections: 2r0010.
+	self junctionCellAt: 3 @ 3 connections: 2r0110.
+	self junctionCellAt: 4 @ 3 connections: 2r1000.
+
+	leftRegion := (area atX: 2 y: 3) substrateRegion.
+	middleRegion := (area atX: 3 y: 3) substrateRegion.
+	rightRegion := (area atX: 4 y: 3) substrateRegion.
+
+	self refreshCompactRegions
+]
+
+{ #category : #tests }
+ChDHorizontalCompactRegionTest >> testHorizontalBranchIsUsed [
+
+	| cell |
+	cell := area atX: 3 y: 3.
+	self assert: cell hasJunction.
+	self deny: cell isVertical.
+	self assert: cell isHorizontal
+]
+
+{ #category : #tests }
+ChDHorizontalCompactRegionTest >> testHorizontalJunctionsShareCompactRegions [
+
+	self assert: leftRegion compactRight notNil.
+	self assert: middleRegion compactLeft notNil.
+	self assert: middleRegion compactRight notNil.
+	self assert: rightRegion compactLeft notNil.
+
+	self assert: middleRegion compactLeft identicalTo: leftRegion compactRight.
+	self assert: middleRegion compactRight identicalTo: rightRegion compactLeft
+]

src/ChipDesigner/ChDJunctionRegion.class.st

@@ -119,16 +119,16 @@ ChDJunctionRegion >> updateCompactRegions [
 		ifFalse: [ "horizontal" 
 			aCell connectedInSubstrateRightOrNil ifNotNil: [ :right |
 				right hasJunction ifTrue: [ 
-					right substrateRegion compactRight ifNil: [ 
+					right substrateRegion compactLeft ifNil: [ 
 						compactRight := self area newCompactRegion.
-						right substrateRegion compactLeft: compactUp. ]
+						right substrateRegion compactLeft: compactRight. ]
 					ifNotNil: [ :aRegion | 
 						compactRight := aRegion ] ] ].
 			aCell connectedInSubstrateLeftOrNil ifNotNil: [ :left |
 				left hasJunction ifTrue: [ 
-					left substrateRegion compactLeft ifNil: [ 
+					left substrateRegion compactRight ifNil: [ 
 						compactLeft := self area newCompactRegion.
-						left substrateRegion compactRight: compactUp. ]
+						left substrateRegion compactRight: compactLeft. ]
 					ifNotNil: [ :aRegion | 
 						compactLeft := aRegion ] ] ] ]
 ]