[test] adjust timeout and dram host mem for amd ci

[sunxxuns]

Motivation

Modifications

Accuracy Tests

Benchmarking and Profiling

Checklist

• Format your code according to the Format code with pre-commit.
• Add unit tests according to the Run and add unit tests.
• Update documentation according to Write documentations.
• Provide accuracy and speed benchmark results according to Test the accuracy and Benchmark the speed.

[gemini-code-assist]

Summary of Changes

Hello @sunxxuns, I'm Gemini Code Assist¹! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!

This pull request focuses on optimizing memory consumption within the system, particularly for continuous integration (CI) environments that may have limited resources or lack virtual DRAM. The changes involve refining memory assertion messages for better debugging, improving the detection of AMD CI machines, and crucially, adjusting hierarchical cache memory parameters to reduce GPU and CPU memory footprint during tests on HIP-enabled systems. This ensures more stable and efficient test execution in resource-constrained CI setups.

Highlights

• Memory Assertion Clarity: The host memory assertion message has been enhanced to display the actual host and device memory sizes in GB, making debugging memory-related issues more straightforward.
• AMD CI Detection Improvement: The is_in_amd_ci utility function now includes a check for is_hip(), providing a more robust detection mechanism for AMD CI environments.
• Hierarchical Cache Memory Optimization for HIP: The hierarchical cache test configuration has been updated to significantly reduce memory usage for HIP (AMD) environments. Specifically, mem-fraction-static is lowered from 0.7 to 0.2, and hicache-size is reduced from 200 to 40, addressing memory constraints on CI machines without virtual DRAM.

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[gemini-code-assist]

Code Review

This pull request aims to reduce GPU and CPU memory consumption for CI environments, particularly for machines without virtual DRAM. The changes primarily involve adjusting memory-related parameters for tests running on AMD GPUs. Specifically, mem-fraction-static and hicache-size are lowered in test/srt/hicache/test_hicache.py. Additionally, the utility function is_in_amd_ci is updated to be more robust by checking for a HIP environment directly. My review focuses on the correctness of these changes. While the adjustments for CI seem appropriate, I've identified an issue in the updated assertion message in python/sglang/srt/mem_cache/memory_pool_host.py. The calculation for memory size in GB is incorrect, and I've provided a suggestion to fix it. The other changes look good.

[gemini-code-assist]

The calculation for memory size in the assertion message is incorrect. self.size and device_pool.size represent the number of tokens, not the size in bytes. To correctly calculate the size in GB, you should multiply the token count by self.size_per_token before dividing by 1024**3. I've also added formatting to improve readability.

Suggested change

	assert (
	self.size > device_pool.size
	), "The host memory should be larger than the device memory with the current protocol"
	), f"The host memory {self.size / 1024**3} GB should be larger than the device memory {device_pool.size/ 1024**3} GB with the current protocol"
	assert (
	self.size > device_pool.size
	), f"The host memory {(self.size * self.size_per_token) / 1024**3:.2f} GB should be larger than the device memory {(device_pool.size * self.size_per_token) / 1024**3:.2f} GB with the current protocol"