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Fix STM32H5 update #617

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Merged
merged 9 commits into from
Oct 29, 2025
Merged

Fix STM32H5 update #617

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58baba2
Fix STM32H5 update
mattia-moffa Oct 23, 2025
fdcd7be
Don't use hardcoded value; add comment
mattia-moffa Oct 23, 2025
70f12a2
Update docs
mattia-moffa Oct 24, 2025
fd2c81a
Fix H5 erase bug
mattia-moffa Oct 24, 2025
e0e9217
Fix some issues with documentation for STM32H5 and include steps to t…
dgarske Oct 24, 2025
177358e
Update H5 app to use new NSC API
mattia-moffa Oct 28, 2025
1813463
Fix non-trustzone configs
mattia-moffa Oct 28, 2025
ea9484f
Add docs for NSC APIs and update H5 option bytes
mattia-moffa Oct 29, 2025
70d25f4
Fix docs link
mattia-moffa Oct 29, 2025
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13 changes: 9 additions & 4 deletions hal/stm32_tz.c
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Original file line number Diff line number Diff line change
Expand Up @@ -96,19 +96,21 @@ void hal_tz_claim_nonsecure_area(uint32_t address, int len)
uint32_t reg;
uint32_t end = address + len;
uint32_t start_address = address;
uint32_t start_page_n;
uint32_t bank = 0;
int pos;

if (!is_range_nonsecure(address, len))
return;

if (address < FLASH_BANK2_BASE) {
page_n = (address - ARCH_FLASH_OFFSET) / FLASH_PAGE_SIZE;
start_page_n = (address - ARCH_FLASH_OFFSET) / FLASH_PAGE_SIZE;
bank = 0;
} else {
page_n = (address - FLASH_BANK2_BASE) / FLASH_PAGE_SIZE;
start_page_n = (address - FLASH_BANK2_BASE) / FLASH_PAGE_SIZE;
bank = 1;
}
page_n = start_page_n;
#ifdef TARGET_stm32h5
/* Take into account current swap configuration */
if ((FLASH_OPTSR_CUR & FLASH_OPTSR_SWAP_BANK) >> 31)
Expand All @@ -129,13 +131,14 @@ void hal_tz_claim_nonsecure_area(uint32_t address, int len)
page_n++;
}
address = start_address;
page_n = start_page_n;
while (address < end) {
/* Erase claimed non-secure page, in secure mode */
#ifndef TARGET_stm32h5
reg = FLASH_CR & (~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER | FLASH_CR_BKER | FLASH_CR_PG | FLASH_CR_MER1 | FLASH_CR_MER2));
FLASH_CR = reg | ((page_n << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER);
#else
reg = FLASH_CR & (~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT) | FLASH_CR_SER | FLASH_CR_BER | FLASH_CR_PG | FLASH_CR_MER));
reg = FLASH_CR & (~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT) | FLASH_CR_SER | FLASH_CR_BER | FLASH_CR_PG | FLASH_CR_MER | (1 << 31)));
FLASH_CR = reg | ((page_n << FLASH_CR_PNB_SHIFT) | FLASH_CR_SER | (bank << 31));
#endif

Expand All @@ -162,8 +165,10 @@ void hal_tz_release_nonsecure_area(void)
{
#ifndef DUALBANK_SWAP
int i;
for (i = 0; i < FLASH_SECBB_NREGS; i++)
for (i = 0; i < FLASH_SECBB_NREGS; i++) {
FLASH_SECBB1[i] = 0;
FLASH_SECBB2[i] = 0;
}
#else
uint32_t addr;
int bank_swp = 0;
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11 changes: 7 additions & 4 deletions hal/stm32h5.c
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Original file line number Diff line number Diff line change
Expand Up @@ -33,17 +33,20 @@

#if TZ_SECURE()

/* This function assumes that the boot and the update
* partitions are at the same address in the two banks,
* regardless if DUALBANK_SWAP is active or not.
*/
static int is_flash_nonsecure(uint32_t address)
{
#ifndef DUALBANK_SWAP
if (address >= WOLFBOOT_PARTITION_BOOT_ADDRESS) {
return 1;
}
return 0;
#else
uint32_t in_bank_offset = (address & 0x000FFFFF);
if (in_bank_offset >= (WOLFBOOT_PARTITION_BOOT_ADDRESS - FLASHMEM_ADDRESS_SPACE)) {
return 1;
}
return 0;
#endif
}
#endif

Expand Down