flow/rtl: relax NumFlows constraints from 2 to 1 where applicable

flow/rtl/BUILD.bazel

@@ -43,6 +43,7 @@ verilog_library(
     deps = [
         ":br_flow_demux_select_unstable",
         ":br_flow_reg_fwd",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -53,6 +54,7 @@ verilog_library(
         "//flow/rtl/internal:br_flow_checks_valid_data_impl",
         "//flow/rtl/internal:br_flow_checks_valid_data_intg",
         "//macros:br_asserts_internal",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -92,6 +94,7 @@ verilog_library(
     deps = [
         ":br_flow_mux_select_unstable",
         ":br_flow_reg_fwd",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -102,6 +105,8 @@ verilog_library(
         "//flow/rtl/internal:br_flow_checks_valid_data_impl",
         "//flow/rtl/internal:br_flow_checks_valid_data_intg",
         "//macros:br_asserts_internal",
+        "//macros:br_unused",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -243,6 +248,7 @@ verilog_library(
     deps = [
         "//arb/rtl/internal:br_arb_fixed_internal",
         "//flow/rtl/internal:br_flow_xbar_core",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -252,6 +258,7 @@ verilog_library(
     deps = [
         "//arb/rtl/internal:br_arb_rr_internal",
         "//flow/rtl/internal:br_flow_xbar_core",
+        "//pkg:br_math_pkg",
     ],
 )
 
@@ -261,13 +268,15 @@ verilog_library(
     deps = [
         "//arb/rtl/internal:br_arb_lru_internal",
         "//flow/rtl/internal:br_flow_xbar_core",
+        "//pkg:br_math_pkg",
     ],
 )
 
 br_verilog_elab_and_lint_test_suite(
     name = "br_flow_arb_fixed_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -279,6 +288,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_arb_rr_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -290,6 +300,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_arb_lru_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -301,6 +312,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_demux_select_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -316,6 +328,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_demux_select_unstable_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -331,6 +344,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_fork_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -342,6 +356,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_fork_select_multihot_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
             "7",
@@ -358,6 +373,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_join_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -369,6 +385,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_select_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -384,6 +401,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_select_unstable_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -399,6 +417,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_fixed_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -414,6 +433,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_rr_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -429,6 +449,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_lru_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -444,6 +465,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_fixed_stable_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -463,6 +485,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_rr_stable_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -482,6 +505,7 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_mux_lru_stable_test_suite",
     params = {
         "NumFlows": [
+            "1",
             "2",
             "3",
         ],
@@ -589,10 +613,12 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_xbar_fixed_test_suite",
     params = {
         "NumPushFlows": [
+            "1",
             "2",
             "4",
         ],
         "NumPopFlows": [
+            "1",
             "2",
             "4",
         ],
@@ -616,10 +642,12 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_xbar_rr_test_suite",
     params = {
         "NumPushFlows": [
+            "1",
             "2",
             "4",
         ],
         "NumPopFlows": [
+            "1",
             "2",
             "4",
         ],
@@ -643,10 +671,12 @@ br_verilog_elab_and_lint_test_suite(
     name = "br_flow_xbar_lru_test_suite",
     params = {
         "NumPushFlows": [
+            "1",
             "2",
             "4",
         ],
         "NumPopFlows": [
+            "1",
             "2",
             "4",
         ],

flow/rtl/br_flow_arb_fixed.sv

@@ -15,8 +15,8 @@
 `include "br_asserts_internal.svh"
 
 module br_flow_arb_fixed #(
-    // Must be at least 2
-    parameter int NumFlows = 2,
+    // Must be at least 1
+    parameter int NumFlows = 1,
     // If 1, cover that the push side experiences backpressure.
     // If 0, assert that there is never backpressure.
     parameter bit EnableCoverPushBackpressure = 1,

flow/rtl/br_flow_arb_lru.sv

@@ -17,8 +17,8 @@
 `include "br_asserts_internal.svh"
 
 module br_flow_arb_lru #(
-    // Must be at least 2
-    parameter int NumFlows = 2,
+    // Must be at least 1
+    parameter int NumFlows = 1,
     // If 1, cover that the push side experiences backpressure.
     // If 0, assert that there is never backpressure.
     parameter bit EnableCoverPushBackpressure = 1,

flow/rtl/br_flow_arb_rr.sv

@@ -17,8 +17,8 @@
 `include "br_asserts_internal.svh"
 
 module br_flow_arb_rr #(
-    // Must be at least 2
-    parameter int NumFlows = 2,
+    // Must be at least 1
+    parameter int NumFlows = 1,
     // If 1, cover that the push side experiences backpressure.
     // If 0, assert that there is never backpressure.
     parameter bit EnableCoverPushBackpressure = 1,

flow/rtl/br_flow_demux_select.sv

@@ -15,8 +15,8 @@
 `include "br_registers.svh"
 
 module br_flow_demux_select #(
-    // Must be at least 2
-    parameter int NumFlows = 2,
+    // Must be at least 1
+    parameter int NumFlows = 1,
     // Must be at least 1
     parameter int Width = 1,
     // If 1, cover that the push side experiences backpressure.
@@ -32,12 +32,13 @@ module br_flow_demux_select #(
     // If 1, assert that push_data is always known (not X) when push_valid is asserted.
     parameter bit EnableAssertPushDataKnown = 1,
     // If 1, then assert there are no valid bits asserted at the end of the test.
-    parameter bit EnableAssertFinalNotValid = 1
+    parameter bit EnableAssertFinalNotValid = 1,
+    localparam int SelectWidth = br_math::clamped_clog2(NumFlows)
 ) (
     input logic clk,
     input logic rst,  // Synchronous active-high
 
-    input logic [$clog2(NumFlows)-1:0] select,
+    input logic [SelectWidth-1:0] select,
 
     output logic             push_ready,
     input  logic             push_valid,

flow/rtl/br_flow_demux_select_unstable.sv

@@ -19,10 +19,11 @@
 // input could change while the selected pop interface is backpressuring.
 
 `include "br_asserts_internal.svh"
+`include "br_unused.svh"
 
 module br_flow_demux_select_unstable #(
-    // Must be at least 2
-    parameter int NumFlows = 2,
+    // Must be at least 1
+    parameter int NumFlows = 1,
     // Must be at least 1
     parameter int Width = 1,
     // If 1, cover that the push side experiences backpressure.
@@ -39,7 +40,7 @@ module br_flow_demux_select_unstable #(
     parameter bit EnableAssertPushDataKnown = 1,
     // If 1, then assert there are no valid bits asserted at the end of the test.
     parameter bit EnableAssertFinalNotValid = 1,
-    localparam int SelectWidth = $clog2(NumFlows)
+    localparam int SelectWidth = br_math::clamped_clog2(NumFlows)
 ) (
     // Used only for assertions
     // ri lint_check_waive INPUT_NOT_READ HIER_NET_NOT_READ HIER_BRANCH_NOT_READ
@@ -69,7 +70,7 @@ module br_flow_demux_select_unstable #(
   //------------------------------------------
   // Integration checks
   //------------------------------------------
-  `BR_ASSERT_STATIC(num_flows_must_be_at_least_two_a, NumFlows >= 2)
+  `BR_ASSERT_STATIC(num_flows_must_be_at_least_one_a, NumFlows >= 1)
   `BR_ASSERT_STATIC(bit_width_must_be_at_least_one_a, Width >= 1)
   `BR_ASSERT_STATIC(select_stability_implies_valid_stability_a,
                     !(EnableAssertSelectStability && !EnableAssertPushValidStability))
@@ -107,18 +108,26 @@ module br_flow_demux_select_unstable #(
   // Implementation
   //------------------------------------------
 
-  // Lint waivers are safe because we assert select is always in range.
-  // ri lint_check_waive VAR_INDEX_READ
-  assign push_ready = pop_ready[select];
-  // The ternary expression is needed to ensure pop_valid_unstable is 0 (and not X)
-  // when select is X and push_valid is 0.
-  // ri lint_check_waive VAR_SHIFT TRUNC_LSHIFT
-  assign pop_valid_unstable = push_valid ? (push_valid << select) : '0;
-  // Replicate pop_data to all flows; this is okay since pop_data[i]
-  // is only valid when pop_valid_unstable[i] is high.
-  always_comb begin
-    for (int i = 0; i < NumFlows; i++) begin
-      pop_data_unstable[i] = push_data;
+  if (NumFlows == 1) begin : gen_single_flow
+    assign push_ready         = pop_ready;
+    assign pop_valid_unstable = push_valid;
+    assign pop_data_unstable  = push_data;
+    `BR_UNUSED(select)
+
+  end else begin : gen_multi_flow
+    // Lint waivers are safe because we assert select is always in range.
+    // ri lint_check_waive VAR_INDEX_READ
+    assign push_ready = pop_ready[select];
+    // The ternary expression is needed to ensure pop_valid_unstable is 0 (and not X)
+    // when select is X and push_valid is 0.
+    // ri lint_check_waive VAR_SHIFT TRUNC_LSHIFT
+    assign pop_valid_unstable = push_valid ? (push_valid << select) : '0;
+    // Replicate pop_data to all flows; this is okay since pop_data[i]
+    // is only valid when pop_valid_unstable[i] is high.
+    always_comb begin
+      for (int i = 0; i < NumFlows; i++) begin
+        pop_data_unstable[i] = push_data;
+      end
     end
   end
 

flow/rtl/br_flow_fork.sv

@@ -12,7 +12,7 @@
 `include "br_asserts_internal.svh"
 
 module br_flow_fork #(
-    parameter int NumFlows = 2,  // Must be at least 2
+    parameter int NumFlows = 1,  // Must be at least 1
     // If 1, cover that the push side experiences backpressure.
     // If 0, assert that there is never backpressure.
     parameter bit EnableCoverPushBackpressure = 1,
@@ -43,7 +43,7 @@ module br_flow_fork #(
   //------------------------------------------
   // Integration checks
   //------------------------------------------
-  `BR_ASSERT_STATIC(num_flows_gte_2_a, NumFlows >= 2)
+  `BR_ASSERT_STATIC(num_flows_gte_1_a, NumFlows >= 1)
 
   br_flow_checks_valid_data_intg #(
       .NumFlows(1),

flow/rtl/br_flow_fork_select_multihot.sv

@@ -13,7 +13,7 @@
 `include "br_asserts_internal.svh"
 
 module br_flow_fork_select_multihot #(
-    parameter int NumFlows = 2,  // Must be at least 2
+    parameter int NumFlows = 1,  // Must be at least 1
     // If 1, cover that the push_select_multihot signal is multihot when valid is high.
     // If 0, assert that the push_select_multihot signal is always onehot when valid is high.
     parameter bit EnableCoverSelectMultihot = 1,
@@ -52,7 +52,7 @@ module br_flow_fork_select_multihot #(
   //------------------------------------------
   // Integration checks
   //------------------------------------------
-  `BR_ASSERT_STATIC(num_flows_gte_2_a, NumFlows >= 2)
+  `BR_ASSERT_STATIC(num_flows_gte_1_a, NumFlows >= 1)
 
   `BR_ASSERT_INTG(select_not_0_when_valid_a, push_valid |-> (|push_select_multihot))
   br_flow_checks_valid_data_intg #(